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Searched refs:r11 (Results 1 – 6 of 6) sorted by relevance

/art/runtime/arch/arm/
Dquick_entrypoints_arm.S31 push {r4-r11, lr} @ 9 words (36 bytes) of callee saves.
40 .cfi_rel_offset r11, 28
63 push {r5-r8, r10-r11, lr} @ 7 words of callee saves
70 .cfi_rel_offset r11, 20
89 pop {r5-r8, r10-r11, lr} @ 7 words of callee saves
95 .cfi_restore r11
110 push {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves and args.
120 .cfi_rel_offset r11, 32
153 pop {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves
162 .cfi_restore r11
[all …]
/art/runtime/arch/x86_64/
Dquick_entrypoints_x86_64.S407 addq MACRO_LITERAL(4), %r11 // arg_array++
411 addq MACRO_LITERAL(4), %r11 // arg_array++
414 movsd (%r11), REG_VAR(xmm_reg, 0)
415 addq MACRO_LITERAL(8), %r11 // arg_array+=2
418 movss (%r11), REG_VAR(xmm_reg, 0)
419 addq MACRO_LITERAL(4), %r11 // arg_array++
440 movl (%r11), REG_VAR(gpr_reg32, 1)
441 addq MACRO_LITERAL(4), %r11 // arg_array++
444 movq (%r11), REG_VAR(gpr_reg64, 0)
445 addq MACRO_LITERAL(8), %r11 // arg_array+=2
[all …]
Dmemcmp16_x86_64.S39 lea TABLE(%rip), %r11; \
40 movslq (%r11, INDEX, SCALE), %rcx; \
41 add %r11, %rcx; \
/art/compiler/jni/
Djni_cfi_test_expected.inc20 // 0x00000000: push {r5, r6, r7, r8, r10, r11, lr}
27 // 0x00000004: .cfi_offset: r11 at cfa-8
79 // 0x00000026: pop {r5, r6, r7, r8, r10, r11, pc}
364 // 0x0000001c: sw r11, +36(r29)
365 // 0x00000020: .cfi_offset: r11 at cfa-28
387 // 0x00000050: lw r11, +36(r29)
388 // 0x00000054: .cfi_restore: r11
/art/compiler/dex/quick/arm/
Darm_lir.h130 r11 = RegStorage::k32BitSolo | RegStorage::kCoreRegister | 11, enumerator
224 constexpr RegStorage rs_r11(RegStorage::kValid | r11);
/art/compiler/dex/quick/x86/
Dx86_lir.h154 r11 = RegStorage::k32BitSolo | RegStorage::kCoreRegister | 11, enumerator
258 constexpr RegStorage rs_r11(RegStorage::kValid | r11);