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Searched refs:rl_src2 (Results 1 – 14 of 14) sorted by relevance

/art/compiler/dex/quick/arm64/
Dfp_arm64.cc27 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
51 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
62 rl_src2 = LoadValue(rl_src2, kFPReg); in GenArithOpFloat()
64 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
69 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
96 LoadValueDirectWideFixed(rl_src2, rs_d1); in GenArithOpDouble()
112 rl_src2 = LoadValueWide(rl_src2, kFPReg); in GenArithOpDouble()
113 DCHECK(rl_src2.wide); in GenArithOpDouble()
117 NewLIR3(WIDE(op), rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble()
233 RegLocation rl_src2; in GenFusedFPCmpBranch() local
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Dint_arm64.cc58 RegLocation rl_src2) { in GenCmpLong() argument
61 rl_src2 = LoadValueWide(rl_src2, kCoreReg); in GenCmpLong()
64 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong()
225 RegLocation rl_src2 = mir_graph_->GetSrcWide(mir, 2); in GenFusedLongCmpBranch() local
231 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
237 if (rl_src2.is_const) { in GenFusedLongCmpBranch()
240 int64_t val = mir_graph_->ConstantValueWide(rl_src2); in GenFusedLongCmpBranch()
249 rl_src2 = UpdateLocWide(rl_src2); in GenFusedLongCmpBranch()
250 if (rl_src2.location != kLocPhysReg) { in GenFusedLongCmpBranch()
258 rl_src2 = LoadValueWide(rl_src2, kCoreReg); in GenFusedLongCmpBranch()
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Dcodegen_arm64.h134 RegLocation rl_src2, int flags) OVERRIDE;
142 RegLocation rl_src2) OVERRIDE;
144 RegLocation rl_src2) OVERRIDE;
146 RegLocation rl_src2) OVERRIDE;
166 RegLocation rl_src2, int flags) OVERRIDE;
171 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
195 void GenMaddMsubInt(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
197 void GenMaddMsubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
347 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
367 void GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
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/art/compiler/dex/quick/x86/
Dfp_x86.cc27 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
54 GenRemFP(rl_dest, rl_src1, rl_src2, false /* is_double */); in GenArithOpFloat()
63 rl_src2 = LoadValue(rl_src2, kFPReg); in GenArithOpFloat()
67 RegStorage r_src2 = rl_src2.reg; in GenArithOpFloat()
78 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
83 DCHECK(rl_src2.wide); in GenArithOpDouble()
84 DCHECK(rl_src2.fp); in GenArithOpDouble()
107 GenRemFP(rl_dest, rl_src1, rl_src2, true /* is_double */); in GenArithOpDouble()
116 rl_src2 = LoadValueWide(rl_src2, kFPReg); in GenArithOpDouble()
118 if (rl_result.reg == rl_src2.reg) { in GenArithOpDouble()
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Dint_x86.cc38 RegLocation rl_src2) { in GenCmpLong() argument
41 rl_src2 = LoadValueWide(rl_src2, kCoreReg); in GenCmpLong()
44 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong()
60 LoadValueDirectWideFixed(rl_src2, r_tmp2); in GenCmpLong()
391 RegLocation rl_src2 = mir_graph_->GetSrcWide(mir, 2); in GenFusedLongCmpBranch() local
395 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
398 if (rl_src2.is_const) { in GenFusedLongCmpBranch()
400 int64_t val = mir_graph_->ConstantValueWide(rl_src2); in GenFusedLongCmpBranch()
407 rl_src2 = LoadValueWide(rl_src2, kCoreReg); in GenFusedLongCmpBranch()
409 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenFusedLongCmpBranch()
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Dcodegen_x86.h181 RegLocation rl_src2) OVERRIDE;
183 RegLocation rl_src2) OVERRIDE;
185 RegLocation rl_src2) OVERRIDE;
201 RegLocation rl_src2, int flags) OVERRIDE;
203 RegLocation rl_src2, int flags) OVERRIDE;
206 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
228 bool GenLongLongImm(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
238 virtual void GenLongArith(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
763 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
817 void GenRemFP(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, bool is_double);
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/art/compiler/dex/quick/arm/
Dfp_arm.cc27 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
55 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
66 rl_src2 = LoadValue(rl_src2, kFPReg); in GenArithOpFloat()
68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
73 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
97 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false); in GenArithOpDouble()
110 rl_src2 = LoadValueWide(rl_src2, kFPReg); in GenArithOpDouble()
111 DCHECK(rl_src2.wide); in GenArithOpDouble()
115 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble()
249 RegLocation rl_src2; in GenFusedFPCmpBranch() local
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Dint_arm.cc133 void ArmMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenCmpLong() argument
137 rl_src2 = LoadValueWide(rl_src2, kCoreReg); in GenCmpLong()
140 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenCmpLong()
143 OpRegRegReg(kOpSub, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenCmpLong()
320 RegLocation rl_src2 = mir_graph_->GetSrcWide(mir, 2); in GenFusedLongCmpBranch() local
324 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
327 if (rl_src2.is_const) { in GenFusedLongCmpBranch()
328 rl_src2 = UpdateLocWide(rl_src2); in GenFusedLongCmpBranch()
330 int64_t val = mir_graph_->ConstantValueWide(rl_src2); in GenFusedLongCmpBranch()
331 if ((rl_src2.location != kLocPhysReg) && in GenFusedLongCmpBranch()
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Dcodegen_arm.h144 RegLocation rl_src2, int flags) OVERRIDE;
146 RegLocation rl_src1, RegLocation rl_src2, int flags);
154 RegLocation rl_src2);
156 RegLocation rl_src2);
158 RegLocation rl_src2);
170 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
193 void GenMaddMsubInt(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
283 RegLocation rl_src2);
293 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
/art/compiler/dex/quick/mips/
Dint_mips.cc53 void MipsMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenCmpLong() argument
55 rl_src2 = LoadValueWide(rl_src2, kCoreReg); in GenCmpLong()
59 NewLIR3(kMipsSlt, temp.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenCmpLong()
60 NewLIR3(kMipsSlt, rl_result.reg.GetReg(), rl_src2.reg.GetReg(), rl_src1.reg.GetReg()); in GenCmpLong()
68 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenCmpLong()
69 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg()); in GenCmpLong()
72 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); in GenCmpLong()
73 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg()); in GenCmpLong()
330 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, in GenDivRem() argument
332 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags); in GenDivRem()
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Dfp_mips.cc27 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
55 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
66 rl_src2 = LoadValue(rl_src2, kFPReg); in GenArithOpFloat()
68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
73 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
97 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false); in GenArithOpDouble()
109 rl_src2 = LoadValueWide(rl_src2, kFPReg); in GenArithOpDouble()
110 DCHECK(rl_src2.wide); in GenArithOpDouble()
114 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble()
209 RegLocation rl_src2) { in GenCmpFP() argument
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Dcodegen_mips.h145 RegLocation rl_src2, int flags);
153 RegLocation rl_src2);
155 RegLocation rl_src2);
157 RegLocation rl_src2);
168 RegLocation rl_src2, int flags) OVERRIDE;
171 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
241 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, bool is_div,
270 void GenAddLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
271 void GenSubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
276 void GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
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/art/compiler/dex/quick/
Dgen_common.cc350 RegLocation rl_src2, LIR* taken) { in GenCompareAndBranch() argument
352 RegisterClass reg_class = (rl_src1.ref || rl_src2.ref) ? kRefReg : kCoreReg; in GenCompareAndBranch()
380 rl_src1 = rl_src2; in GenCompareAndBranch()
381 rl_src2 = rl_temp; in GenCompareAndBranch()
387 if (rl_src2.is_const) { in GenCompareAndBranch()
389 RegLocation rl_temp = UpdateLoc(rl_src2); in GenCompareAndBranch()
390 int32_t constant_value = mir_graph_->ConstantValue(rl_src2); in GenCompareAndBranch()
394 OpCmpImmBranch(cond, rl_src1.reg, mir_graph_->ConstantValue(rl_src2), taken); in GenCompareAndBranch()
409 rl_src2 = LoadValue(rl_src2, reg_class); in GenCompareAndBranch()
410 OpCmpBranch(cond, rl_src1.reg, rl_src2.reg, taken); in GenCompareAndBranch()
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Dmir_to_lir.h795 bool HandleEasyFloatingPointDiv(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
813 void GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, RegLocation rl_src2,
842 RegLocation rl_src1, RegLocation rl_src2);
848 RegLocation rl_src1, RegLocation rl_src2, int flags);
857 RegLocation rl_src1, RegLocation rl_src2, int flags);
1278 RegLocation rl_src1, RegLocation rl_src2, int flags) = 0;
1281 RegLocation rl_src2) = 0;
1283 RegLocation rl_src1, RegLocation rl_src2) = 0;
1285 RegLocation rl_src1, RegLocation rl_src2) = 0;
1320 RegLocation rl_src2, bool is_div, int flags) = 0;
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