| /art/compiler/utils/arm/ |
| D | assembler_arm32.h | 205 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
207 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
209 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
211 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
213 void Rrx(Register rd, Register rm, bool setcc = false,
216 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
218 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
220 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
222 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
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| D | assembler_thumb2.h | 244 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
246 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
248 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
250 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
252 void Rrx(Register rd, Register rm, bool setcc = false,
255 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
257 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
259 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
261 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
436 void EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc = false);
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| D | assembler_arm32.cc | 1154 bool setcc, Condition cond) { in Lsl() argument
1156 if (setcc) { in Lsl()
1165 bool setcc, Condition cond) { in Lsr() argument
1168 if (setcc) { in Lsr()
1177 bool setcc, Condition cond) { in Asr() argument
1180 if (setcc) { in Asr()
1189 bool setcc, Condition cond) { in Ror() argument
1191 if (setcc) { in Ror()
1198 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { in Rrx() argument
1199 if (setcc) { in Rrx()
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| D | assembler_arm.h | 622 virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
624 virtual void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
626 virtual void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
628 virtual void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
630 virtual void Rrx(Register rd, Register rm, bool setcc = false,
633 virtual void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
635 virtual void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
637 virtual void Asr(Register rd, Register rm, Register rn, bool setcc = false,
639 virtual void Ror(Register rd, Register rm, Register rn, bool setcc = false,
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| D | assembler_thumb2.cc | 1202 void Thumb2Assembler::EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) { in EmitShift() argument
1218 0xf << 16 | (setcc ? B20 : 0); in EmitShift()
1241 void Thumb2Assembler::EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) { in EmitShift() argument
1261 0xf << 12 | (setcc ? B20 : 0); in EmitShift()
2321 bool setcc, Condition cond) { in Lsl() argument
2324 EmitShift(rd, rm, LSL, shift_imm, setcc); in Lsl()
2329 bool setcc, Condition cond) { in Lsr() argument
2333 EmitShift(rd, rm, LSR, shift_imm, setcc); in Lsr()
2338 bool setcc, Condition cond) { in Asr() argument
2342 EmitShift(rd, rm, ASR, shift_imm, setcc); in Asr()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 600 void setcc(Condition condition, CpuRegister dst);
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| D | assembler_x86_64_test.cc | 1078 assembler->setcc(static_cast<x86_64::Condition>(i), *reg); in setcc_test_fn()
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| D | assembler_x86_64.cc | 2042 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc() function in art::x86_64::X86_64Assembler
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| /art/compiler/optimizing/ |
| D | intrinsics_x86_64.cc | 1481 __ setcc(kZero, out); in GenCAS() local
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| D | code_generator_x86_64.cc | 978 __ setcc(X86_64Condition(comp->GetCondition()), reg); in VisitCondition() local
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