Searched refs:true_val (Results 1 – 9 of 9) sorted by relevance
| /art/compiler/dex/quick/arm/ |
| D | int_arm.cc | 218 int32_t true_val, int32_t false_val, RegStorage rs_dest, in GenSelectConst32() argument
222 DCHECK(InexpensiveConstantInt(true_val)); in GenSelectConst32()
225 if ((true_val == 0 && code == kCondEq) || in GenSelectConst32()
230 LoadConstant(rs_dest, code == kCondEq ? false_val : true_val); in GenSelectConst32()
237 LoadConstant(rs_dest, true_val); // .eq case - load true in GenSelectConst32()
254 int true_val = mir->dalvikInsn.vB; in GenSelect() local
260 std::swap(true_val, false_val); in GenSelect()
263 if (cheap_false_val && ccode == kCondEq && (true_val == 0 || true_val == -1)) { in GenSelect()
264 OpRegRegImm(kOpSub, rl_result.reg, rl_src.reg, -true_val); in GenSelect()
266 LIR* it = OpIT(true_val == 0 ? kCondNe : kCondUge, ""); in GenSelect()
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| D | codegen_arm.h | 181 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 99 void Arm64Mir2Lir::GenSelect(int32_t true_val, int32_t false_val, ConditionCode ccode, in GenSelect() argument
102 true_val == 1 || // Potentially Csinc. in GenSelect()
103 true_val == -1 || // Potentially Csinv. in GenSelect()
104 true_val == false_val + 1) { // Potentially Csinc. in GenSelect()
106 std::swap(true_val, false_val); in GenSelect()
119 if (true_val == 0) { in GenSelect()
123 LoadConstantNoClobber(rs_dest, true_val); in GenSelect()
131 } else if (false_val == true_val + 1) { in GenSelect()
134 } else if (false_val == -true_val) { in GenSelect()
137 } else if (false_val == ~true_val) { in GenSelect()
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| D | codegen_arm64.h | 182 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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| /art/compiler/dex/quick/x86/ |
| D | int_x86.cc | 213 int32_t true_val, int32_t false_val, RegStorage rs_dest, in GenSelectConst32() argument
220 if (true_val == false_val) { in GenSelectConst32()
221 LoadConstantNoClobber(rs_dest, true_val); in GenSelectConst32()
227 const bool zero_one_case = (true_val == 0 && false_val == 1) || (true_val == 1 && false_val == 0); in GenSelectConst32()
235 X86ConditionEncoding(true_val == 1 ? code : FlipComparisonOrder(code))); in GenSelectConst32()
246 std::swap(true_val, false_val); in GenSelectConst32()
251 LoadConstantNoClobber(temp_reg, true_val); in GenSelectConst32()
266 LoadConstantNoClobber(rs_dest, true_val); in GenSelectConst32()
287 int true_val = mir->dalvikInsn.vB; in GenSelect() local
291 if (true_val == false_val) { in GenSelect()
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| D | codegen_x86.h | 272 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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| /art/compiler/dex/quick/mips/ |
| D | int_mips.cc | 281 int32_t true_val, int32_t false_val, RegStorage rs_dest, in GenSelectConst32() argument
286 LoadConstant(rs_dest, true_val); in GenSelectConst32()
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| D | codegen_mips.h | 182 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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| /art/compiler/dex/quick/ |
| D | mir_to_lir.h | 1364 int32_t true_val, int32_t false_val, RegStorage rs_dest,
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