1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI__SOUND_EMU10K1_H 20 #define _UAPI__SOUND_EMU10K1_H 21 #include <linux/types.h> 22 #define EMU10K1_CARD_CREATIVE 0x00000000 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define EMU10K1_CARD_EMUAPS 0x00000001 25 #define EMU10K1_FX8010_PCM_COUNT 8 26 #define iMAC0 0x00 27 #define iMAC1 0x01 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define iMAC2 0x02 30 #define iMAC3 0x03 31 #define iMACINT0 0x04 32 #define iMACINT1 0x05 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define iACC3 0x06 35 #define iMACMV 0x07 36 #define iANDXOR 0x08 37 #define iTSTNEG 0x09 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define iLIMITGE 0x0a 40 #define iLIMITLT 0x0b 41 #define iLOG 0x0c 42 #define iEXP 0x0d 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define iINTERP 0x0e 45 #define iSKIP 0x0f 46 #define FXBUS(x) (0x00 + (x)) 47 #define EXTIN(x) (0x10 + (x)) 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define EXTOUT(x) (0x20 + (x)) 50 #define FXBUS2(x) (0x30 + (x)) 51 #define C_00000000 0x40 52 #define C_00000001 0x41 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define C_00000002 0x42 55 #define C_00000003 0x43 56 #define C_00000004 0x44 57 #define C_00000008 0x45 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define C_00000010 0x46 60 #define C_00000020 0x47 61 #define C_00000100 0x48 62 #define C_00010000 0x49 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define C_00080000 0x4a 65 #define C_10000000 0x4b 66 #define C_20000000 0x4c 67 #define C_40000000 0x4d 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define C_80000000 0x4e 70 #define C_7fffffff 0x4f 71 #define C_ffffffff 0x50 72 #define C_fffffffe 0x51 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define C_c0000000 0x52 75 #define C_4f1bbcdc 0x53 76 #define C_5a7ef9db 0x54 77 #define C_00100000 0x55 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define GPR_ACCU 0x56 80 #define GPR_COND 0x57 81 #define GPR_NOISE0 0x58 82 #define GPR_NOISE1 0x59 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 #define GPR_IRQ 0x5a 85 #define GPR_DBAC 0x5b 86 #define GPR(x) (FXGPREGBASE + (x)) 87 #define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 #define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x)) 90 #define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) 91 #define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) 92 #define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) 95 #define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) 96 #define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) 97 #define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x)) 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x)) 100 #define A_FXBUS(x) (0x00 + (x)) 101 #define A_EXTIN(x) (0x40 + (x)) 102 #define A_P16VIN(x) (0x50 + (x)) 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 #define A_EXTOUT(x) (0x60 + (x)) 105 #define A_FXBUS2(x) (0x80 + (x)) 106 #define A_EMU32OUTH(x) (0xa0 + (x)) 107 #define A_EMU32OUTL(x) (0xb0 + (x)) 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 #define A3_EMU32IN(x) (0x160 + (x)) 110 #define A3_EMU32OUT(x) (0x1E0 + (x)) 111 #define A_GPR(x) (A_FXGPREGBASE + (x)) 112 #define CC_REG_NORMALIZED C_00000001 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 #define CC_REG_BORROW C_00000002 115 #define CC_REG_MINUS C_00000004 116 #define CC_REG_ZERO C_00000008 117 #define CC_REG_SATURATE C_00000010 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 #define CC_REG_NONZERO C_00000100 120 #define FXBUS_PCM_LEFT 0x00 121 #define FXBUS_PCM_RIGHT 0x01 122 #define FXBUS_PCM_LEFT_REAR 0x02 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 #define FXBUS_PCM_RIGHT_REAR 0x03 125 #define FXBUS_MIDI_LEFT 0x04 126 #define FXBUS_MIDI_RIGHT 0x05 127 #define FXBUS_PCM_CENTER 0x06 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 #define FXBUS_PCM_LFE 0x07 130 #define FXBUS_PCM_LEFT_FRONT 0x08 131 #define FXBUS_PCM_RIGHT_FRONT 0x09 132 #define FXBUS_MIDI_REVERB 0x0c 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 #define FXBUS_MIDI_CHORUS 0x0d 135 #define FXBUS_PCM_LEFT_SIDE 0x0e 136 #define FXBUS_PCM_RIGHT_SIDE 0x0f 137 #define FXBUS_PT_LEFT 0x14 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 #define FXBUS_PT_RIGHT 0x15 140 #define EXTIN_AC97_L 0x00 141 #define EXTIN_AC97_R 0x01 142 #define EXTIN_SPDIF_CD_L 0x02 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 #define EXTIN_SPDIF_CD_R 0x03 145 #define EXTIN_ZOOM_L 0x04 146 #define EXTIN_ZOOM_R 0x05 147 #define EXTIN_TOSLINK_L 0x06 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 #define EXTIN_TOSLINK_R 0x07 150 #define EXTIN_LINE1_L 0x08 151 #define EXTIN_LINE1_R 0x09 152 #define EXTIN_COAX_SPDIF_L 0x0a 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 #define EXTIN_COAX_SPDIF_R 0x0b 155 #define EXTIN_LINE2_L 0x0c 156 #define EXTIN_LINE2_R 0x0d 157 #define EXTOUT_AC97_L 0x00 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define EXTOUT_AC97_R 0x01 160 #define EXTOUT_TOSLINK_L 0x02 161 #define EXTOUT_TOSLINK_R 0x03 162 #define EXTOUT_AC97_CENTER 0x04 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 #define EXTOUT_AC97_LFE 0x05 165 #define EXTOUT_HEADPHONE_L 0x06 166 #define EXTOUT_HEADPHONE_R 0x07 167 #define EXTOUT_REAR_L 0x08 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 #define EXTOUT_REAR_R 0x09 170 #define EXTOUT_ADC_CAP_L 0x0a 171 #define EXTOUT_ADC_CAP_R 0x0b 172 #define EXTOUT_MIC_CAP 0x0c 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 #define EXTOUT_AC97_REAR_L 0x0d 175 #define EXTOUT_AC97_REAR_R 0x0e 176 #define EXTOUT_ACENTER 0x11 177 #define EXTOUT_ALFE 0x12 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 #define A_EXTIN_AC97_L 0x00 180 #define A_EXTIN_AC97_R 0x01 181 #define A_EXTIN_SPDIF_CD_L 0x02 182 #define A_EXTIN_SPDIF_CD_R 0x03 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 #define A_EXTIN_OPT_SPDIF_L 0x04 185 #define A_EXTIN_OPT_SPDIF_R 0x05 186 #define A_EXTIN_LINE2_L 0x08 187 #define A_EXTIN_LINE2_R 0x09 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 #define A_EXTIN_ADC_L 0x0a 190 #define A_EXTIN_ADC_R 0x0b 191 #define A_EXTIN_AUX2_L 0x0c 192 #define A_EXTIN_AUX2_R 0x0d 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 #define A_EXTOUT_FRONT_L 0x00 195 #define A_EXTOUT_FRONT_R 0x01 196 #define A_EXTOUT_CENTER 0x02 197 #define A_EXTOUT_LFE 0x03 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 #define A_EXTOUT_HEADPHONE_L 0x04 200 #define A_EXTOUT_HEADPHONE_R 0x05 201 #define A_EXTOUT_REAR_L 0x06 202 #define A_EXTOUT_REAR_R 0x07 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 #define A_EXTOUT_AFRONT_L 0x08 205 #define A_EXTOUT_AFRONT_R 0x09 206 #define A_EXTOUT_ACENTER 0x0a 207 #define A_EXTOUT_ALFE 0x0b 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 #define A_EXTOUT_ASIDE_L 0x0c 210 #define A_EXTOUT_ASIDE_R 0x0d 211 #define A_EXTOUT_AREAR_L 0x0e 212 #define A_EXTOUT_AREAR_R 0x0f 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 #define A_EXTOUT_AC97_L 0x10 215 #define A_EXTOUT_AC97_R 0x11 216 #define A_EXTOUT_ADC_CAP_L 0x16 217 #define A_EXTOUT_ADC_CAP_R 0x17 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 #define A_EXTOUT_MIC_CAP 0x18 220 #define A_C_00000000 0xc0 221 #define A_C_00000001 0xc1 222 #define A_C_00000002 0xc2 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 #define A_C_00000003 0xc3 225 #define A_C_00000004 0xc4 226 #define A_C_00000008 0xc5 227 #define A_C_00000010 0xc6 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 #define A_C_00000020 0xc7 230 #define A_C_00000100 0xc8 231 #define A_C_00010000 0xc9 232 #define A_C_00000800 0xca 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 #define A_C_10000000 0xcb 235 #define A_C_20000000 0xcc 236 #define A_C_40000000 0xcd 237 #define A_C_80000000 0xce 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 #define A_C_7fffffff 0xcf 240 #define A_C_ffffffff 0xd0 241 #define A_C_fffffffe 0xd1 242 #define A_C_c0000000 0xd2 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 #define A_C_4f1bbcdc 0xd3 245 #define A_C_5a7ef9db 0xd4 246 #define A_C_00100000 0xd5 247 #define A_GPR_ACCU 0xd6 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 #define A_GPR_COND 0xd7 250 #define A_GPR_NOISE0 0xd8 251 #define A_GPR_NOISE1 0xd9 252 #define A_GPR_IRQ 0xda 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 #define A_GPR_DBAC 0xdb 255 #define A_GPR_DBACE 0xde 256 #define EMU10K1_DBG_ZC 0x80000000 257 #define EMU10K1_DBG_SATURATION_OCCURED 0x02000000 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 #define EMU10K1_DBG_SATURATION_ADDR 0x01ff0000 260 #define EMU10K1_DBG_SINGLE_STEP 0x00008000 261 #define EMU10K1_DBG_STEP 0x00004000 262 #define EMU10K1_DBG_CONDITION_CODE 0x00003e00 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 #define EMU10K1_DBG_SINGLE_STEP_ADDR 0x000001ff 265 #define TANKMEMADDRREG_ADDR_MASK 0x000fffff 266 #define TANKMEMADDRREG_CLEAR 0x00800000 267 #define TANKMEMADDRREG_ALIGN 0x00400000 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 #define TANKMEMADDRREG_WRITE 0x00200000 270 #define TANKMEMADDRREG_READ 0x00100000 271 struct snd_emu10k1_fx8010_info { 272 unsigned int internal_tram_size; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 unsigned int external_tram_size; 275 char fxbus_names[16][32]; 276 char extin_names[16][32]; 277 char extout_names[32][32]; 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 unsigned int gpr_controls; 280 }; 281 #define EMU10K1_GPR_TRANSLATION_NONE 0 282 #define EMU10K1_GPR_TRANSLATION_TABLE100 1 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 #define EMU10K1_GPR_TRANSLATION_BASS 2 285 #define EMU10K1_GPR_TRANSLATION_TREBLE 3 286 #define EMU10K1_GPR_TRANSLATION_ONOFF 4 287 struct snd_emu10k1_fx8010_control_gpr { 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 struct snd_ctl_elem_id id; 290 unsigned int vcount; 291 unsigned int count; 292 unsigned short gpr[32]; 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 unsigned int value[32]; 295 unsigned int min; 296 unsigned int max; 297 unsigned int translation; 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 const unsigned int * tlv; 300 }; 301 struct snd_emu10k1_fx8010_control_old_gpr { 302 struct snd_ctl_elem_id id; 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 unsigned int vcount; 305 unsigned int count; 306 unsigned short gpr[32]; 307 unsigned int value[32]; 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 unsigned int min; 310 unsigned int max; 311 unsigned int translation; 312 }; 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 struct snd_emu10k1_fx8010_code { 315 char name[128]; 316 DECLARE_BITMAP(gpr_valid, 0x200); 317 __u32 __user * gpr_map; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 unsigned int gpr_add_control_count; 320 struct snd_emu10k1_fx8010_control_gpr __user * gpr_add_controls; 321 unsigned int gpr_del_control_count; 322 struct snd_ctl_elem_id __user * gpr_del_controls; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 unsigned int gpr_list_control_count; 325 unsigned int gpr_list_control_total; 326 struct snd_emu10k1_fx8010_control_gpr __user * gpr_list_controls; 327 DECLARE_BITMAP(tram_valid, 0x100); 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 __u32 __user * tram_data_map; 330 __u32 __user * tram_addr_map; 331 DECLARE_BITMAP(code_valid, 1024); 332 __u32 __user * code; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 }; 335 struct snd_emu10k1_fx8010_tram { 336 unsigned int address; 337 unsigned int size; 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 unsigned int * samples; 340 }; 341 struct snd_emu10k1_fx8010_pcm_rec { 342 unsigned int substream; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 unsigned int res1; 345 unsigned int channels; 346 unsigned int tram_start; 347 unsigned int buffer_size; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 unsigned short gpr_size; 350 unsigned short gpr_ptr; 351 unsigned short gpr_count; 352 unsigned short gpr_tmpcount; 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 unsigned short gpr_trigger; 355 unsigned short gpr_running; 356 unsigned char pad; 357 unsigned char etram[32]; 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 unsigned int res2; 360 }; 361 #define SNDRV_EMU10K1_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 362 #define SNDRV_EMU10K1_IOCTL_INFO _IOR('H', 0x10, struct snd_emu10k1_fx8010_info) 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 #define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW('H', 0x11, struct snd_emu10k1_fx8010_code) 365 #define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, struct snd_emu10k1_fx8010_code) 366 #define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW('H', 0x20, int) 367 #define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW('H', 0x21, struct snd_emu10k1_fx8010_tram) 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 #define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, struct snd_emu10k1_fx8010_tram) 370 #define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW('H', 0x30, struct snd_emu10k1_fx8010_pcm_rec) 371 #define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, struct snd_emu10k1_fx8010_pcm_rec) 372 #define SNDRV_EMU10K1_IOCTL_PVERSION _IOR('H', 0x40, int) 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 #define SNDRV_EMU10K1_IOCTL_STOP _IO('H', 0x80) 375 #define SNDRV_EMU10K1_IOCTL_CONTINUE _IO('H', 0x81) 376 #define SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER _IO('H', 0x82) 377 #define SNDRV_EMU10K1_IOCTL_SINGLE_STEP _IOW('H', 0x83, int) 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 #define SNDRV_EMU10K1_IOCTL_DBG_READ _IOR('H', 0x84, int) 380 typedef struct snd_emu10k1_fx8010_info emu10k1_fx8010_info_t; 381 typedef struct snd_emu10k1_fx8010_control_gpr emu10k1_fx8010_control_gpr_t; 382 typedef struct snd_emu10k1_fx8010_code emu10k1_fx8010_code_t; 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 typedef struct snd_emu10k1_fx8010_tram emu10k1_fx8010_tram_t; 385 typedef struct snd_emu10k1_fx8010_pcm_rec emu10k1_fx8010_pcm_t; 386 #endif 387