1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef __MGA_DRM_H__
20 #define __MGA_DRM_H__
21 #include <drm/drm.h>
22 #ifndef __MGA_SAREA_DEFINES__
23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24 #define __MGA_SAREA_DEFINES__
25 #define MGA_F 0x1
26 #define MGA_A 0x2
27 #define MGA_S 0x4
28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29 #define MGA_T2 0x8
30 #define MGA_WARP_TGZ 0
31 #define MGA_WARP_TGZF (MGA_F)
32 #define MGA_WARP_TGZA (MGA_A)
33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34 #define MGA_WARP_TGZAF (MGA_F | MGA_A)
35 #define MGA_WARP_TGZS (MGA_S)
36 #define MGA_WARP_TGZSF (MGA_S | MGA_F)
37 #define MGA_WARP_TGZSA (MGA_S | MGA_A)
38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 #define MGA_WARP_TGZSAF (MGA_S | MGA_F | MGA_A)
40 #define MGA_WARP_T2GZ (MGA_T2)
41 #define MGA_WARP_T2GZF (MGA_T2 | MGA_F)
42 #define MGA_WARP_T2GZA (MGA_T2 | MGA_A)
43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44 #define MGA_WARP_T2GZAF (MGA_T2 | MGA_A | MGA_F)
45 #define MGA_WARP_T2GZS (MGA_T2 | MGA_S)
46 #define MGA_WARP_T2GZSF (MGA_T2 | MGA_S | MGA_F)
47 #define MGA_WARP_T2GZSA (MGA_T2 | MGA_S | MGA_A)
48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49 #define MGA_WARP_T2GZSAF (MGA_T2 | MGA_S | MGA_F | MGA_A)
50 #define MGA_MAX_G200_PIPES 8
51 #define MGA_MAX_G400_PIPES 16
52 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54 #define MGA_WARP_UCODE_SIZE 32768
55 #define MGA_CARD_TYPE_G200 1
56 #define MGA_CARD_TYPE_G400 2
57 #define MGA_CARD_TYPE_G450 3
58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59 #define MGA_CARD_TYPE_G550 4
60 #define MGA_FRONT 0x1
61 #define MGA_BACK 0x2
62 #define MGA_DEPTH 0x4
63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64 #define MGA_UPLOAD_CONTEXT 0x1
65 #define MGA_UPLOAD_TEX0 0x2
66 #define MGA_UPLOAD_TEX1 0x4
67 #define MGA_UPLOAD_PIPE 0x8
68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69 #define MGA_UPLOAD_TEX0IMAGE 0x10
70 #define MGA_UPLOAD_TEX1IMAGE 0x20
71 #define MGA_UPLOAD_2D 0x40
72 #define MGA_WAIT_AGE 0x80
73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 #define MGA_UPLOAD_CLIPRECTS 0x100
75 #define MGA_BUFFER_SIZE (1 << 16)
76 #define MGA_NUM_BUFFERS 128
77 #define MGA_NR_SAREA_CLIPRECTS 8
78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79 #define MGA_CARD_HEAP 0
80 #define MGA_AGP_HEAP 1
81 #define MGA_NR_TEX_HEAPS 2
82 #define MGA_NR_TEX_REGIONS 16
83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84 #define MGA_LOG_MIN_TEX_REGION_SIZE 16
85 #define DRM_MGA_IDLE_RETRY 2048
86 #endif
87 typedef struct {
88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89   unsigned int dstorg;
90   unsigned int maccess;
91   unsigned int plnwt;
92   unsigned int dwgctl;
93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94   unsigned int alphactrl;
95   unsigned int fogcolor;
96   unsigned int wflag;
97   unsigned int tdualstage0;
98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99   unsigned int tdualstage1;
100   unsigned int fcol;
101   unsigned int stencil;
102   unsigned int stencilctl;
103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104 } drm_mga_context_regs_t;
105 typedef struct {
106   unsigned int pitch;
107 } drm_mga_server_regs_t;
108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109 typedef struct {
110   unsigned int texctl;
111   unsigned int texctl2;
112   unsigned int texfilter;
113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114   unsigned int texbordercol;
115   unsigned int texorg;
116   unsigned int texwidth;
117   unsigned int texheight;
118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119   unsigned int texorg1;
120   unsigned int texorg2;
121   unsigned int texorg3;
122   unsigned int texorg4;
123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124 } drm_mga_texture_regs_t;
125 typedef struct {
126   unsigned int head;
127   unsigned int wrap;
128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 } drm_mga_age_t;
130 typedef struct _drm_mga_sarea {
131   drm_mga_context_regs_t context_state;
132   drm_mga_server_regs_t server_state;
133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134   drm_mga_texture_regs_t tex_state[2];
135   unsigned int warp_pipe;
136   unsigned int dirty;
137   unsigned int vertsize;
138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139   struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS];
140   unsigned int nbox;
141   unsigned int req_drawable;
142   unsigned int req_draw_buffer;
143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144   unsigned int exported_drawable;
145   unsigned int exported_index;
146   unsigned int exported_stamp;
147   unsigned int exported_buffers;
148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149   unsigned int exported_nfront;
150   unsigned int exported_nback;
151   int exported_back_x, exported_front_x, exported_w;
152   int exported_back_y, exported_front_y, exported_h;
153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154   struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS];
155   unsigned int status[4];
156   unsigned int last_wrap;
157   drm_mga_age_t last_frame;
158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159   unsigned int last_enqueue;
160   unsigned int last_dispatch;
161   unsigned int last_quiescent;
162   struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164   unsigned int texAge[MGA_NR_TEX_HEAPS];
165   int ctxOwner;
166 } drm_mga_sarea_t;
167 #define DRM_MGA_INIT 0x00
168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 #define DRM_MGA_FLUSH 0x01
170 #define DRM_MGA_RESET 0x02
171 #define DRM_MGA_SWAP 0x03
172 #define DRM_MGA_CLEAR 0x04
173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174 #define DRM_MGA_VERTEX 0x05
175 #define DRM_MGA_INDICES 0x06
176 #define DRM_MGA_ILOAD 0x07
177 #define DRM_MGA_BLIT 0x08
178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179 #define DRM_MGA_GETPARAM 0x09
180 #define DRM_MGA_SET_FENCE 0x0a
181 #define DRM_MGA_WAIT_FENCE 0x0b
182 #define DRM_MGA_DMA_BOOTSTRAP 0x0c
183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184 #define DRM_IOCTL_MGA_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
185 #define DRM_IOCTL_MGA_FLUSH DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock)
186 #define DRM_IOCTL_MGA_RESET DRM_IO(DRM_COMMAND_BASE + DRM_MGA_RESET)
187 #define DRM_IOCTL_MGA_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_MGA_SWAP)
188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 #define DRM_IOCTL_MGA_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
190 #define DRM_IOCTL_MGA_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
191 #define DRM_IOCTL_MGA_INDICES DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
192 #define DRM_IOCTL_MGA_ILOAD DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194 #define DRM_IOCTL_MGA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
195 #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
196 #define DRM_IOCTL_MGA_SET_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32)
197 #define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32)
198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199 #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t)
200 typedef struct _drm_mga_warp_index {
201   int installed;
202   unsigned long phys_addr;
203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204   int size;
205 } drm_mga_warp_index_t;
206 typedef struct drm_mga_init {
207   enum {
208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209     MGA_INIT_DMA = 0x01,
210     MGA_CLEANUP_DMA = 0x02
211   } func;
212   unsigned long sarea_priv_offset;
213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214   int chipset;
215   int sgram;
216   unsigned int maccess;
217   unsigned int fb_cpp;
218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219   unsigned int front_offset, front_pitch;
220   unsigned int back_offset, back_pitch;
221   unsigned int depth_cpp;
222   unsigned int depth_offset, depth_pitch;
223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224   unsigned int texture_offset[MGA_NR_TEX_HEAPS];
225   unsigned int texture_size[MGA_NR_TEX_HEAPS];
226   unsigned long fb_offset;
227   unsigned long mmio_offset;
228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229   unsigned long status_offset;
230   unsigned long warp_offset;
231   unsigned long primary_offset;
232   unsigned long buffers_offset;
233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234 } drm_mga_init_t;
235 typedef struct drm_mga_dma_bootstrap {
236   unsigned long texture_handle;
237   __u32 texture_size;
238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239   __u32 primary_size;
240   __u32 secondary_bin_count;
241   __u32 secondary_bin_size;
242   __u32 agp_mode;
243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244   __u8 agp_size;
245 } drm_mga_dma_bootstrap_t;
246 typedef struct drm_mga_clear {
247   unsigned int flags;
248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249   unsigned int clear_color;
250   unsigned int clear_depth;
251   unsigned int color_mask;
252   unsigned int depth_mask;
253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254 } drm_mga_clear_t;
255 typedef struct drm_mga_vertex {
256   int idx;
257   int used;
258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259   int discard;
260 } drm_mga_vertex_t;
261 typedef struct drm_mga_indices {
262   int idx;
263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264   unsigned int start;
265   unsigned int end;
266   int discard;
267 } drm_mga_indices_t;
268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269 typedef struct drm_mga_iload {
270   int idx;
271   unsigned int dstorg;
272   unsigned int length;
273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274 } drm_mga_iload_t;
275 typedef struct _drm_mga_blit {
276   unsigned int planemask;
277   unsigned int srcorg;
278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279   unsigned int dstorg;
280   int src_pitch, dst_pitch;
281   int delta_sx, delta_sy;
282   int delta_dx, delta_dy;
283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284   int height, ydir;
285   int source_pitch, dest_pitch;
286 } drm_mga_blit_t;
287 #define MGA_PARAM_IRQ_NR 1
288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289 #define MGA_PARAM_CARD_TYPE 2
290 typedef struct drm_mga_getparam {
291   int param;
292   void __user * value;
293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294 } drm_mga_getparam_t;
295 #endif
296