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/external/llvm/test/Transforms/SimplifyCFG/X86/
Dswitch_to_lookup_table.ll34 switch i32 %c, label %sw.default [
36 i32 43, label %sw.bb1
37 i32 44, label %sw.bb2
38 i32 45, label %sw.bb3
39 i32 46, label %sw.bb4
40 i32 47, label %sw.bb5
41 i32 48, label %sw.bb6
44 sw.bb1: br label %return
45 sw.bb2: br label %return
46 sw.bb3: br label %return
[all …]
/external/llvm/test/CodeGen/ARM/
D2011-08-25-ldmia_ret.ll6 ; into sw.bb18 resulting in an ldmia_ret in the middle of the
20 br i1 %call, label %sw.bb18, label %sw.bb2
22 sw.bb2: ; preds = %entry
24 br i1 %cmp, label %sw.epilog58, label %land.lhs.true
26 land.lhs.true: ; preds = %sw.bb2
28 br i1 %cmp13, label %if.then, label %sw.epilog58
32 br label %sw.epilog58
46 sw.bb18:
48 switch i32 %call20, label %sw.default56 [
49 i32 168, label %sw.bb21
[all …]
Djumptable-label.ll11 i32 1, label %sw.bb
12 i32 2, label %sw.bb6
13 i32 3, label %sw.bb13
14 i32 4, label %sw.bb20
17 sw.bb: ; preds = %entry
20 sw.bb6: ; preds = %entry
23 sw.bb13: ; preds = %entry
26 sw.bb20: ; preds = %entry
30 return: ; preds = %sw.bb20, %sw.bb13, %sw.bb6, %sw.bb, %e…
31 …%retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ]…
Ddata-in-code-annotations.ll20 i32 1, label %sw.bb
21 i32 2, label %sw.bb6
22 i32 3, label %sw.bb13
23 i32 4, label %sw.bb20
26 sw.bb: ; preds = %entry
29 sw.bb6: ; preds = %entry
32 sw.bb13: ; preds = %entry
35 sw.bb20: ; preds = %entry
39 return: ; preds = %sw.bb20, %sw.bb13, %sw.bb6, %sw.bb, %e…
40 …%retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ]…
/external/llvm/test/CodeGen/Mips/
Djtstat.ll12 switch i32 %0, label %sw.epilog [
13 i32 115, label %sw.bb
14 i32 105, label %sw.bb1
15 i32 100, label %sw.bb2
16 i32 108, label %sw.bb3
17 i32 99, label %sw.bb4
18 i32 68, label %sw.bb5
19 i32 81, label %sw.bb6
20 i32 76, label %sw.bb7
23 sw.bb: ; preds = %entry
[all …]
/external/llvm/test/Transforms/InstCombine/
Dnarrow-switch.ll14 switch i64 %and, label %sw.default [
16 i64 100, label %sw.bb1
17 i64 1001, label %sw.bb2
20 sw.bb1:
23 sw.bb2:
26 sw.default:
30 %retval.0 = phi i32 [ 24, %sw.default ], [ 123, %sw.bb2 ], [ 213, %sw.bb1 ], [ 231, %entry ]
43 switch i64 %or, label %sw.default [
45 i64 -100, label %sw.bb1
46 i64 -1001, label %sw.bb2
[all …]
/external/llvm/test/Transforms/Inline/
Dswitch.ll4 switch i32 %a, label %sw.default [
5 i32 0, label %sw.bb0
6 i32 1, label %sw.bb1
7 i32 2, label %sw.bb2
8 i32 3, label %sw.bb3
9 i32 4, label %sw.bb4
10 i32 5, label %sw.bb5
11 i32 6, label %sw.bb6
12 i32 7, label %sw.bb7
13 i32 8, label %sw.bb8
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dpr22711.ll13 switch i32 %1, label %sw.epilog [
14 i32 17, label %sw.bb
15 i32 13, label %sw.bb1
16 i32 11, label %sw.bb2
17 i32 7, label %sw.bb3
18 i32 5, label %sw.bb4
19 i32 3, label %sw.bb5
20 i32 2, label %sw.bb6
23 sw.bb: ; preds = %entry
26 br label %sw.epilog
[all …]
Dmcm-5.ll15 switch i32 %0, label %sw.default [
16 i32 3, label %sw.bb
17 i32 4, label %sw.bb1
18 i32 5, label %sw.bb2
19 i32 6, label %sw.bb3
22 sw.default: ; preds = %entry
23 br label %sw.epilog
25 sw.bb: ; preds = %entry
29 br label %sw.bb1
31 sw.bb1: ; preds = %entry, %sw.bb
[all …]
/external/llvm/test/Transforms/SimplifyCFG/SPARC/
Dswitch_to_lookup_table.ll8 switch i32 %c, label %sw.default [
10 i32 43, label %sw.bb1
11 i32 44, label %sw.bb2
12 i32 45, label %sw.bb3
13 i32 46, label %sw.bb4
14 i32 47, label %sw.bb5
15 i32 48, label %sw.bb6
18 sw.bb1: br label %return
19 sw.bb2: br label %return
20 sw.bb3: br label %return
[all …]
/external/llvm/test/CodeGen/X86/
Dswitch-bt.ll22 switch i32 %conv, label %sw.default [
23 i32 62, label %sw.bb
24 i32 60, label %sw.bb
25 i32 38, label %sw.bb2
26 i32 94, label %sw.bb2
27 i32 61, label %sw.bb2
28 i32 33, label %sw.bb4
31 sw.bb: ; preds = %entry, %entry
33 br label %sw.epilog
35 sw.bb2: ; preds = %entry, %entry, %entry
[all …]
Dtailcall-cgp-dup.ll10 i32 1, label %sw.bb
11 i32 2, label %sw.bb1
12 i32 3, label %sw.bb3
13 i32 4, label %sw.bb5
14 i32 5, label %sw.bb7
15 i32 6, label %sw.bb9
18 sw.bb: ; preds = %entry
23 sw.bb1: ; preds = %entry
28 sw.bb3: ; preds = %entry
33 sw.bb5: ; preds = %entry
[all …]
Dtail-dup-addr.ll15 br i1 %foo, label %sw.bb, label %sw.default
17 sw.bb: ; preds = %entry
18 store i8* blockaddress(@foo, %sw.bb1), i8** @p, align 8
19 br label %sw.bb1
21 sw.bb1: ; preds = %sw.default, %sw.bb, %entry
22 store i8* blockaddress(@foo, %sw.default), i8** @p, align 8
23 br label %sw.default
25 sw.default: ; preds = %sw.bb1, %entry
26 store i8* blockaddress(@foo, %sw.bb1), i8** @p, align 8
27 br label %sw.bb1
/external/llvm/test/Transforms/SimplifyCFG/
Dpreserve-branchweights-switch-create.ll49 i32 2, label %sw.bb
50 i32 3, label %sw.bb1
53 ; CHECK: switch i32 %N, label %sw.epilog
54 ; CHECK: i32 2, label %sw.bb
55 ; CHECK: i32 3, label %sw.bb1
56 ; CHECK: i32 4, label %sw.bb5
59 sw.bb:
61 br label %sw.epilog
63 sw.bb1:
65 br label %sw.epilog
[all …]
DForwardSwitchConditionToPHI.ll11 switch i32 %m, label %sw.bb4 [
12 i32 0, label %sw.bb0
13 i32 1, label %sw.bb1
14 i32 2, label %sw.bb2
15 i32 3, label %sw.bb3
18 sw.bb0: ; preds = %entry
21 sw.bb1: ; preds = %entry
24 sw.bb2: ; preds = %entry
27 sw.bb3: ; preds = %entry
30 sw.bb4: ; preds = %entry
[all …]
/external/valgrind/none/tests/x86/
Dinsn_mmx.def8 packssdw mm.sd[12345,123456] mm.sd[-12345,-123456] => 1.sw[-12345,-32768,12345,32767]
9 packssdw m64.sd[12345,123456] mm.sd[-12345,-123456] => 1.sw[-12345,-32768,12345,32767]
10 packsswb mm.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.sb[21,-21,127,-128,123,-123,127,-12…
11 packsswb m64.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.sb[21,-21,127,-128,123,-123,127,-1…
12 packuswb mm.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.ub[21,0,255,0,123,0,255,0]
13 packuswb m64.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.ub[21,0,255,0,123,0,255,0]
20 paddsw mm.sw[12345,-12345,32145,-32145] mm.sw[32145,-32145,-12345,12345] => 1.sw[32767,-32768,19800…
21 paddsw m64.sw[12345,-12345,32145,-32145] mm.sw[32145,-32145,-12345,12345] => 1.sw[32767,-32768,1980…
26 paddw mm.sw[1234,5678,4321,8765] mm.sw[87,65,43,21] => 1.sw[1321,5743,4364,8786]
27 paddw m64.sw[1234,5678,4321,8765] mm.sw[87,65,43,21] => 1.sw[1321,5743,4364,8786]
[all …]
Dinsn_mmxext.def14 pmaxsw mm.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] => 1.sw[2,2,4,4]
15 pmaxsw m64.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] => 1.sw[2,2,4,4]
18 pminsw mm.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] => 1.sw[-1,-3,-3,-5]
19 pminsw m64.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] => 1.sw[-1,-3,-3,-5]
25 psadbw mm.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] => 1.sw[32,0,0,0]
26 psadbw m64.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] => 1.sw[32,0,0,0]
27 pshufw imm8[0x1b] mm.sw[11,22,33,44] mm.sw[0,0,0,0] => 2.sw[44,33,22,11]
28 pshufw imm8[0x1b] m64.sw[11,22,33,44] mm.sw[0,0,0,0] => 2.sw[44,33,22,11]
/external/valgrind/coregrind/m_syswrap/
Dsyscall-mips32-linux.S81 sw $4, 52($29)
82 sw $5, 48($29)
83 sw $6, 44($29)
84 sw $7, 40($29)
85 sw $31, 36($29)
86 sw $30, 32($29)
87 sw $16, 28($29)
88 sw $17, 24($29)
89 sw $18, 20($29)
90 sw $19, 16($29)
[all …]
/external/valgrind/none/tests/amd64/
Dinsn_mmx.def28 packssdw mm.sd[12345,123456] mm.sd[-12345,-123456] => 1.sw[-12345,-32768,12345,32767]
29 packssdw m64.sd[12345,123456] mm.sd[-12345,-123456] => 1.sw[-12345,-32768,12345,32767]
30 packsswb mm.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.sb[21,-21,127,-128,123,-123,127,-12…
31 packsswb m64.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.sb[21,-21,127,-128,123,-123,127,-1…
32 packuswb mm.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.ub[21,0,255,0,123,0,255,0]
33 packuswb m64.sw[123,-123,1234,-1234] mm.sw[21,-21,321,-321] => 1.ub[21,0,255,0,123,0,255,0]
40 paddsw mm.sw[12345,-12345,32145,-32145] mm.sw[32145,-32145,-12345,12345] => 1.sw[32767,-32768,19800…
41 paddsw m64.sw[12345,-12345,32145,-32145] mm.sw[32145,-32145,-12345,12345] => 1.sw[32767,-32768,1980…
46 paddw mm.sw[1234,5678,4321,8765] mm.sw[87,65,43,21] => 1.sw[1321,5743,4364,8786]
47 paddw m64.sw[1234,5678,4321,8765] mm.sw[87,65,43,21] => 1.sw[1321,5743,4364,8786]
[all …]
/external/valgrind/coregrind/m_dispatch/
Ddispatch-mips32-linux.S70 sw $31, 16($29)
73 sw $16, 20($29)
74 sw $17, 24($29)
75 sw $18, 28($29)
76 sw $19, 32($29)
77 sw $20, 36($29)
78 sw $21, 40($29)
79 sw $22, 44($29)
80 sw $23, 48($29)
83 sw $28, 52($29)
[all …]
/external/llvm/test/CodeGen/MSP430/
Djumptable.ll17 switch i16 %0, label %sw.default [
18 i16 0, label %sw.bb
19 i16 1, label %sw.bb1
20 i16 2, label %sw.bb2
21 i16 3, label %sw.bb3
24 sw.bb: ; preds = %entry
28 sw.bb1: ; preds = %entry
32 sw.bb2: ; preds = %entry
36 sw.bb3: ; preds = %entry
40 sw.default: ; preds = %entry
[all …]
/external/llvm/test/Transforms/MergeFunc/
D2013-01-10-MergeFuncAssert.ll6 switch i32 undef, label %sw.bb12 [
7 i32 127, label %sw.bb
8 i32 126, label %sw.bb4
11 sw.bb: ; preds = %entry
14 sw.bb4: ; preds = %entry
17 sw.bb12: ; preds = %entry
23 switch i32 undef, label %sw.bb8 [
24 i32 4, label %sw.bb
25 i32 3, label %sw.bb4
28 sw.bb: ; preds = %entry
[all …]
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/duration/
DDataReadWriteTest.java48 StringWriter sw = new StringWriter(); in testOpenClose() local
49 XMLRecordWriter xrw = new XMLRecordWriter(sw); in testOpenClose()
53 String str = sw.toString(); in testOpenClose()
63 StringWriter sw = new StringWriter(); in testBool() local
64 XMLRecordWriter xrw = new XMLRecordWriter(sw); in testBool()
68 String str = sw.toString(); in testBool()
97 StringWriter sw = new StringWriter(); in testBoolArray() local
98 XMLRecordWriter xrw = new XMLRecordWriter(sw); in testBoolArray()
101 String str = sw.toString(); in testBoolArray()
117 StringWriter sw = new StringWriter(); in testCharacter() local
[all …]
/external/llvm/test/Transforms/LoopRotate/
Dindirectbr.ll21 end_opcode: ; preds = %indirectgoto, %sw.default42406, %sw.de…
22 …%opcode.2 = phi i8 [ %opcode.0, %indirectgoto ], [ 0, %sw.default42406 ], [ undef, %sw.default ], …
24 i32 221, label %sw.bb11691
25 i32 253, label %sw.bb30351
28 sw.bb11691: ; preds = %end_opcode
29 br label %sw.default
31 sw.default: ; preds = %sw.bb11691
34 sw.bb30351: ; preds = %end_opcode
35 br label %sw.default42406
37 sw.default42406: ; preds = %sw.bb30351
/external/llvm/test/Transforms/GVN/
Dpre-gep-load.ll8 switch i32 %stat, label %sw.default [
9 i32 0, label %sw.bb
10 i32 1, label %sw.bb
11 i32 2, label %sw.bb2
14 sw.bb: ; preds = %entry, %entry
24 if.then: ; preds = %sw.bb
27 if.end: ; preds = %sw.bb
28 br label %sw.bb2
30 sw.bb2: ; preds = %if.end, %entry
36 ; CHECK: sw.bb2:
[all …]

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