| /external/pcre/dist/sljit/ |
| D | sljitNativeMIPS_32.c | 79 return push_inst(compiler, ADDU | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
139 FAIL_IF(push_inst(compiler, ADDU | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1))); in emit_single_op()
149 return push_inst(compiler, ADDU | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG); in emit_single_op()
179 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
184 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
212 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
217 FAIL_IF(push_inst(compiler, ADDU | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst))); in emit_single_op()
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| D | sljitNativeMIPS_64.c | 170 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
231 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1))); in emit_single_op()
241 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG); in emit_single_op()
271 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLA… in emit_single_op()
276 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
304 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
309 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(ULESS_FLAG) | D(dst), DR(dst))); in emit_single_op()
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| D | sljitNativeMIPS_common.c | 101 #define ADDU (HI(0) | LO(33)) macro
187 #define ADDU_W ADDU
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| /external/valgrind/none/tests/mips64/ |
| D | arithmetic_instruction.c | 6 ADD=0, ADDI, ADDIU, ADDU, enumerator
55 case ADDU: in main()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 613 unsigned ADDU = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu; in expandEhReturn() local
626 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9) in expandEhReturn()
629 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA) in expandEhReturn()
632 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg); in expandEhReturn()
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| D | MipsDSPInstrFormats.td | 33 // ADDU.QB sub-class format.
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| D | Mips16InstrInfo.td | 574 // Format: ADDU rz, rx, ry MIPS16e
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| /external/v8/src/mips/ |
| D | constants-mips.cc | 237 case ADDU: in InstructionType()
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| D | constants-mips.h | 397 ADDU = ((4 << 3) + 1), enumerator
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| D | disasm-mips.cc | 738 case ADDU: in DecodeTypeRegister()
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| D | simulator-mips.cc | 2017 case ADDU: in ConfigureTypeRegister()
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| D | assembler-mips.cc | 1471 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
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| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 251 case ADDU: in InstructionType()
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| D | constants-mips64.h | 381 ADDU = ((4 << 3) + 1), enumerator
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| D | disasm-mips64.cc | 857 case ADDU: in DecodeTypeRegister()
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| D | simulator-mips64.cc | 2126 case ADDU: { in ConfigureTypeRegister()
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| D | assembler-mips64.cc | 1450 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
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| /external/valgrind/none/tests/mips32/ |
| D | MIPS32int.stdout.exp-mips32-BE | 34 ADDU
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| D | MIPS32int.stdout.exp-mips32-LE | 34 ADDU
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| D | MIPS32int.stdout.exp-mips32r2-LE | 34 ADDU
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| D | MIPS32int.stdout.exp-mips32r2-BE | 34 ADDU
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| D | mips32_dsp.stdout.exp-LE | 256 -------- ADDU.QB --------
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| D | mips32_dsp.stdout.exp-BE | 256 -------- ADDU.QB --------
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