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Searched refs:AMDGPUTargetMachine (Results 1 – 21 of 21) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUTargetMachine.cpp38 RegisterTargetMachine<AMDGPUTargetMachine> X(TheAMDGPUTarget); in LLVMInitializeAMDGPUTarget()
41 AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT, in AMDGPUTargetMachine() function in AMDGPUTargetMachine
68 AMDGPUTargetMachine::~AMDGPUTargetMachine() in ~AMDGPUTargetMachine()
75 AMDGPUPassConfig(AMDGPUTargetMachine *TM, PassManagerBase &PM) in AMDGPUPassConfig()
78 AMDGPUTargetMachine &getAMDGPUTargetMachine() const { in getAMDGPUTargetMachine()
79 return getTM<AMDGPUTargetMachine>(); in getAMDGPUTargetMachine()
91 TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
DSIRegisterInfo.h22 class AMDGPUTargetMachine; variable
27 AMDGPUTargetMachine &TM;
30 SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
Dradeon_llvm_emit.cpp126 TargetMachine &AMDGPUTargetMachine = *tm.get(); in radeon_llvm_compile() local
128 PM.add(new TargetData(*AMDGPUTargetMachine.getTargetData())); in radeon_llvm_compile()
130 AMDGPUTargetMachine.setAsmVerbosityDefault(true); in radeon_llvm_compile()
137 if (AMDGPUTargetMachine.addPassesToEmitFile(PM, out, TargetMachine::CGFT_ObjectFile, in radeon_llvm_compile()
DAMDGPUTargetMachine.h29 class AMDGPUTargetMachine : public LLVMTargetMachine {
41 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
46 ~AMDGPUTargetMachine();
DR600RegisterInfo.h27 AMDGPUTargetMachine &TM;
30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
DR600InstrInfo.h25 class AMDGPUTargetMachine; variable
35 AMDGPUTargetMachine &TM;
40 explicit R600InstrInfo(AMDGPUTargetMachine &tm);
DSIInstrInfo.h26 AMDGPUTargetMachine &TM;
29 explicit SIInstrInfo(AMDGPUTargetMachine &tm);
DAMDGPU.h20 class AMDGPUTargetMachine; variable
DSIRegisterInfo.cpp20 SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm, in SIRegisterInfo()
DAMDGPURegisterInfo.h27 class AMDGPUTargetMachine; variable
DSIInstrInfo.cpp25 SIInstrInfo::SIInstrInfo(AMDGPUTargetMachine &tm) in SIInstrInfo()
DMakefile.sources60 AMDGPUTargetMachine.cpp \
DR600RegisterInfo.cpp20 R600RegisterInfo::R600RegisterInfo(AMDGPUTargetMachine &tm, in R600RegisterInfo()
DAMDGPUInstrInfo.h35 class AMDGPUTargetMachine; variable
DR600InstrInfo.cpp27 R600InstrInfo::R600InstrInfo(AMDGPUTargetMachine &tm) in R600InstrInfo()
/external/llvm/lib/Target/R600/
DAMDGPUTargetMachine.cpp69 AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT, in AMDGPUTargetMachine() function in AMDGPUTargetMachine
82 AMDGPUTargetMachine::~AMDGPUTargetMachine() { in ~AMDGPUTargetMachine()
93 AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { } in R600TargetMachine()
103 AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { } in GCNTargetMachine()
115 AMDGPUTargetMachine &getAMDGPUTargetMachine() const { in getAMDGPUTargetMachine()
116 return getTM<AMDGPUTargetMachine>(); in getAMDGPUTargetMachine()
158 TargetIRAnalysis AMDGPUTargetMachine::getTargetIRAnalysis() { in getTargetIRAnalysis()
DAMDGPUTargetMachine.h31 class AMDGPUTargetMachine : public LLVMTargetMachine {
40 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
43 ~AMDGPUTargetMachine();
63 class R600TargetMachine : public AMDGPUTargetMachine {
77 class GCNTargetMachine : public AMDGPUTargetMachine {
DAMDGPUTargetTransformInfo.h40 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM) in AMDGPUTTIImpl()
DAMDGPU.h21 class AMDGPUTargetMachine; variable
DCMakeLists.txt25 AMDGPUTargetMachine.cpp
DR600InstrInfo.h25 class AMDGPUTargetMachine; variable