/external/tremolo/Tremolo/ |
D | mdctLARM.s | 63 MOV r5, r5, ASR #9 @ r5 = (*--r)>>9 64 MOV r6, r6, ASR #9 @ r6 = (*--r)>>9 65 MOV r7, r7, ASR #9 @ r7 = (*--r)>>9 66 MOV r12,r12,ASR #9 @ r12= (*--r)>>9 68 MOV r14,r12,ASR #15 69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range 70 EORNE r12,r4, r14,ASR #31 73 MOV r14,r7, ASR #15 74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range 75 EORNE r7, r4, r14,ASR #31 [all …]
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D | mdctARM.s | 65 MOV r5, r5, ASR #9 @ r5 = (*--r)>>9 66 MOV r6, r6, ASR #9 @ r6 = (*--r)>>9 67 MOV r7, r7, ASR #9 @ r7 = (*--r)>>9 68 MOV r12,r12,ASR #9 @ r12= (*--r)>>9 70 MOV r14,r12,ASR #15 71 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range 72 EORNE r12,r4, r14,ASR #31 75 MOV r14,r7, ASR #15 76 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range 77 EORNE r7, r4, r14,ASR #31 [all …]
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D | dpen.s | 264 MOVGT r14,r14,ASR r11 @ r14= add = s->q_min >> add (if add >0) 301 ADD r1, r11,r1, ASR r5 @ r1 = v = prev+((add+mul*v)>>shiftM) 332 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM 346 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM 375 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM 386 ADD r2, r11,r2, ASR r5 @ r2 = v = prev+(add+mul*v)>>shiftM
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D | floor1LARM.s | 56 MOV r4, r4, ASR #6
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/external/aac/libSBRdec/src/arm/ |
D | env_calc_arm.cpp | 118 MOVS r3, r3, ASR #1 in FDK_get_maxval() 126 EOR r4, r4, r4, ASR #31 in FDK_get_maxval() 127 EOR r5, r5, r5, ASR #31 in FDK_get_maxval() 134 EOR r4, r4, r4, ASR #31 in FDK_get_maxval() 135 EOR r5, r5, r5, ASR #31 in FDK_get_maxval()
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/external/sonivox/arm-hybrid-22k/lib_src/ |
D | ARM-E_voice_gain_gnu.s | 96 MOV gainLeft, gainLeft, ASR #(NUM_MIXER_GUARD_BITS - 2) 97 MOV gainIncLeft, gainIncLeft, ASR #(SYNTH_UPDATE_PERIOD_IN_BITS + NUM_MIXER_GUARD_BITS - 2) 104 MOV gainRight, gainRight, ASR #(NUM_MIXER_GUARD_BITS - 2) 105 MOV gainIncRight, gainIncRight, ASR #(SYNTH_UPDATE_PERIOD_IN_BITS + NUM_MIXER_GUARD_BITS - 2) 142 MOV gainIncrement, gainIncrement, ASR #SYNTH_UPDATE_PERIOD_IN_BITS 152 MOV tmp0, tmp0, ASR #1 @ add 6dB headroom
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D | ARM-E_filter_gnu.s | 81 MOV b2, b2, ASR #1 @ b2 = b2 >> 1 82 MOV K, K, ASR #1 @ K = K >> 1 100 MOV z1, tmp0, ASR #14 @ shift result to low word 113 MOV z1, tmp1, ASR #14 @ shift result to low word
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D | ARM-E_interpolate_loop_gnu.s | 107 MOV tmp0, tmp0, ASR #2 @ reduce 16-bit signal by 12dB 110 ADD tmp1, tmp0, tmp1, ASR #(NUM_EG1_FRAC_BITS-6) @ tmp1 = tmp0 + (tmp1 >> (15-6))
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D | ARM-E_interpolate_noloop_gnu.s | 99 MOV tmp0, tmp0, ASR #2 @ reduce 16-bit signal by 12dB 102 ADD tmp1, tmp0, tmp1, ASR #(NUM_EG1_FRAC_BITS-6) @ tmp1 = tmp0 + (tmp1 >> (15-6))
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/external/sonivox/arm-wt-22k/lib_src/ |
D | ARM-E_voice_gain_gnu.s | 96 MOV gainLeft, gainLeft, ASR #(NUM_MIXER_GUARD_BITS - 2) 97 MOV gainIncLeft, gainIncLeft, ASR #(SYNTH_UPDATE_PERIOD_IN_BITS + NUM_MIXER_GUARD_BITS - 2) 104 MOV gainRight, gainRight, ASR #(NUM_MIXER_GUARD_BITS - 2) 105 MOV gainIncRight, gainIncRight, ASR #(SYNTH_UPDATE_PERIOD_IN_BITS + NUM_MIXER_GUARD_BITS - 2) 142 MOV gainIncrement, gainIncrement, ASR #SYNTH_UPDATE_PERIOD_IN_BITS 152 MOV tmp0, tmp0, ASR #1 @ add 6dB headroom
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D | ARM-E_filter_gnu.s | 81 MOV b2, b2, ASR #1 @ b2 = b2 >> 1 82 MOV K, K, ASR #1 @ K = K >> 1 100 MOV z1, tmp0, ASR #14 @ shift result to low word 113 MOV z1, tmp1, ASR #14 @ shift result to low word
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D | ARM-E_interpolate_noloop_gnu.s | 99 MOV tmp0, tmp0, ASR #2 @ reduce 16-bit signal by 12dB 102 ADD tmp1, tmp0, tmp1, ASR #(NUM_EG1_FRAC_BITS-6) @ tmp1 = tmp0 + (tmp1 >> (15-6))
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D | ARM-E_interpolate_loop_gnu.s | 107 MOV tmp0, tmp0, ASR #2 @ reduce 16-bit signal by 12dB 110 ADD tmp1, tmp0, tmp1, ASR #(NUM_EG1_FRAC_BITS-6) @ tmp1 = tmp0 + (tmp1 >> (15-6))
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/external/v8/test/cctest/ |
D | test-disasm-arm.cc | 139 COMPARE(add(r7, r8, Operand(ip, ASR, 1)), in TEST() 141 COMPARE(add(r7, r8, Operand(ip, ASR, 0)), in TEST() 145 COMPARE(add(r7, r8, Operand(ip, ASR, 31), SetCC, vs), in TEST() 148 COMPARE(adc(r7, fp, Operand(ip, ASR, 5)), in TEST() 150 COMPARE(adc(r4, ip, Operand(ip, ASR, 1), LeaveCC, vc), in TEST() 154 COMPARE(adc(r8, lr, Operand(ip, ASR, 31), SetCC, vc), in TEST() 175 COMPARE(tst(r7, Operand(r5, ASR, ip), ge), in TEST() 177 COMPARE(tst(r7, Operand(r6, ASR, sp)), in TEST() 181 COMPARE(tst(r7, Operand(r8, ASR, fp), ge), in TEST() 199 COMPARE(cmp(r7, Operand(r8, ASR, 19)), in TEST() [all …]
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D | test-disasm-arm64.cc | 141 COMPARE(Mov(x8, Operand(x9, ASR, 42)), "asr x8, x9, #42"); in TEST_() 161 COMPARE(Mvn(x8, Operand(x9, ASR, 63)), "mvn x8, x9, asr #63"); in TEST_() 327 COMPARE(add(w18, w19, Operand(w20, ASR, 5)), "add w18, w19, w20, asr #5"); in TEST_() 328 COMPARE(add(x21, x22, Operand(x23, ASR, 6)), "add x21, x22, x23, asr #6"); in TEST_() 353 COMPARE(sub(w18, w19, Operand(w20, ASR, 5)), "sub w18, w19, w20, asr #5"); in TEST_() 354 COMPARE(sub(x21, x22, Operand(x23, ASR, 6)), "sub x21, x22, x23, asr #6"); in TEST_() 360 COMPARE(negs(x3, Operand(x4, ASR, 61)), "negs x3, x4, asr #61"); in TEST_() 703 COMPARE(and_(x9, x10, Operand(x11, ASR, 3)), "and x9, x10, x11, asr #3"); in TEST_() 709 COMPARE(bic(x24, x25, Operand(x26, ASR, 7)), "bic x24, x25, x26, asr #7"); in TEST_() 715 COMPARE(orr(x9, x10, Operand(x11, ASR, 11)), "orr x9, x10, x11, asr #11"); in TEST_() [all …]
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D | test-assembler-arm.cc | 175 __ mov(r2, Operand(r0, ASR, 1)); 183 __ mov(r2, Operand(r2, ASR, 3)); 400 __ usat(r2, 12, Operand(r0, ASR, 9)); // Sat (0xFFFF>>9) to 0-4095 = 0x7F. 951 __ mov(r1, Operand(r1, ASR, 1), SetCC); 956 __ mov(r2, Operand(r2, ASR, 1), SetCC); 963 __ mov(r3, Operand(r1, ASR, 1), SetCC); // Set the carry. 969 __ mov(r3, Operand(r2, ASR, 1), SetCC); // Unset the carry. 1372 __ pkhtb(r2, r0, Operand(r1, ASR, 8));
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D | test-assembler-arm64.cc | 301 __ Mvn(w6, Operand(w0, ASR, 11)); in TEST() 302 __ Mvn(x7, Operand(x1, ASR, 12)); in TEST() 374 __ Mov(w19, Operand(w11, ASR, 11)); in TEST() 375 __ Mov(x20, Operand(x12, ASR, 12)); in TEST() 530 __ Orr(w6, w0, Operand(w1, ASR, 4)); in TEST() 531 __ Orr(x7, x0, Operand(x1, ASR, 4)); in TEST() 627 __ Orn(w6, w0, Operand(w1, ASR, 1)); in TEST() 628 __ Orn(x7, x0, Operand(x1, ASR, 1)); in TEST() 696 __ And(w6, w0, Operand(w1, ASR, 20)); in TEST() 697 __ And(x7, x0, Operand(x1, ASR, 20)); in TEST() [all …]
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 36 ASR, enumerator 57 case AArch64_AM::ASR: return "asr"; in getShiftExtendName() 78 case 2: return AArch64_AM::ASR; in getShiftType() 106 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
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/external/llvm/test/Transforms/InstCombine/ |
D | idioms.ll | 4 ; simplified into a single ASR operation:
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 65 # ASR (immediate) 76 # ASR (register)
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/external/v8/src/arm64/ |
D | regexp-macro-assembler-arm64.cc | 844 __ Add(capture_start, input_length, Operand(capture_start, ASR, 1)); in GetCode() 845 __ Add(capture_end, input_length, Operand(capture_end, ASR, 1)); in GetCode() 883 Operand(capture_start, ASR, 1)); in GetCode() 884 __ Add(capture_end, input_length, Operand(capture_end, ASR, 1)); in GetCode() 912 __ Add(capture_start, input_length, Operand(capture_start, ASR, 1)); in GetCode() 913 __ Add(capture_end, input_length, Operand(capture_end, ASR, 1)); in GetCode()
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D | assembler-arm64-inl.h | 436 return Operand(smi, ASR, kSmiShift); 448 return Operand(smi, ASR, kSmiShift - scale); 1117 DCHECK(shift == LSL || shift == LSR || shift == ASR || shift == ROR);
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/external/libavc/encoder/arm/ |
D | ih264e_fmt_conv.s | 266 @ SUB r10,r10,r7,ASR #1 ;// u2_offset3 = u4_stride_v - u4_width >> 1
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/external/libvpx/libvpx/vp8/common/arm/armv6/ |
D | vp8_variance8x8_armv6.asm | 95 sub r0, r5, r1, ASR #6 ; return (sse - ((sum * sum) >> 6))
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/external/lldb/source/Plugins/Process/Utility/ |
D | ARMUtils.h | 164 static inline uint32_t ASR(const uint32_t value, const uint32_t amount, bool *success) in ASR() function
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