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Searched refs:Aalu_AND (Results 1 – 3 of 3) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_amd64_isel.c734 AMD64Instr_Alu64R(Aalu_AND, AMD64RMI_Imm(7), tmp)); in genGuestArrayOffset()
795 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in set_SSE_rounding_mode()
826 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, AMD64RMI_Imm(3), rrm2)); in set_FPU_rounding_mode()
988 aluOp = Aalu_AND; break; in iselIntExpr_R_wrk()
1035 Aalu_AND, AMD64RMI_Imm(0xFF), dst)); in iselIntExpr_R_wrk()
1039 Aalu_AND, AMD64RMI_Imm(0xFFFF), dst)); in iselIntExpr_R_wrk()
1296 Aalu_AND, AMD64RMI_Imm(0xFFFF), lo16)); in iselIntExpr_R_wrk()
1311 Aalu_AND, AMD64RMI_Imm(0xFF), lo8)); in iselIntExpr_R_wrk()
1356 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, AMD64RMI_Imm(0x45), dst)); in iselIntExpr_R_wrk()
1386 addInstr(env, AMD64Instr_Alu64R(Aalu_AND, in iselIntExpr_R_wrk()
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Dhost_amd64_defs.h273 Aalu_AND, Aalu_OR, Aalu_XOR, enumerator
Dhost_amd64_defs.c480 case Aalu_AND: return "and"; in showAMD64AluOp()
650 case Aalu_AND: case Aalu_OR: case Aalu_XOR: break; in AMD64Instr_Alu32R()
2484 case Aalu_AND: opc = 0x23; opc_rr = 0x21; in emit_AMD64Instr()
2615 case Aalu_AND: opc = 0x23; opc_rr = 0x21; in emit_AMD64Instr()