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Searched refs:Aalu_OR (Results 1 – 3 of 3) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_amd64_isel.c799 Aalu_OR, AMD64RMI_Imm(DEFAULT_MXCSR), reg)); in set_SSE_rounding_mode()
828 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, in set_FPU_rounding_mode()
990 aluOp = Aalu_OR; break; in iselIntExpr_R_wrk()
1269 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, AMD64RMI_Reg(rdx), dst)); in iselIntExpr_R_wrk()
1283 Aalu_OR, AMD64RMI_Reg(lo32), hi32)); in iselIntExpr_R_wrk()
1298 Aalu_OR, AMD64RMI_Reg(lo16), hi16)); in iselIntExpr_R_wrk()
1313 Aalu_OR, AMD64RMI_Reg(lo8), hi8)); in iselIntExpr_R_wrk()
1430 case Iop_Or32: aluOp = Aalu_OR; break; in iselIntExpr_R_wrk()
1570 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, in iselIntExpr_R_wrk()
1584 addInstr(env, AMD64Instr_Alu64R(Aalu_OR, in iselIntExpr_R_wrk()
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Dhost_amd64_defs.h273 Aalu_AND, Aalu_OR, Aalu_XOR, enumerator
Dhost_amd64_defs.c481 case Aalu_OR: return "or"; in showAMD64AluOp()
650 case Aalu_AND: case Aalu_OR: case Aalu_XOR: break; in AMD64Instr_Alu32R()
2488 case Aalu_OR: opc = 0x0B; opc_rr = 0x09; in emit_AMD64Instr()
2619 case Aalu_OR: opc = 0x0B; opc_rr = 0x09; in emit_AMD64Instr()