| /external/v8/src/mips/ |
| D | constants-mips.cc | 139 case BGTZ: in IsForbiddenInBranchDelay()
295 case BGTZ: in InstructionType()
|
| D | assembler-mips.cc | 503 opcode == BGTZ || in IsBranch()
1224 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1262 GenInstrImmediate(BGTZ, rs, rt, offset); in bltuc()
1338 GenInstrImmediate(BGTZ, rt, rt, offset); in bltzalc()
1345 GenInstrImmediate(BGTZ, zero_reg, rt, offset); in bgtzalc()
|
| D | constants-mips.h | 322 BGTZ = ((0 << 3) + 7) << kOpcodeShift, enumerator
|
| D | disasm-mips.cc | 1057 case BGTZ: in DecodeTypeImmediate()
|
| D | simulator-mips.cc | 2808 case BGTZ: in DecodeTypeImmediate()
2938 case BGTZ: in DecodeTypeImmediate()
|
| D | macro-assembler-mips.cc | 6069 opcode == BGTZ || in ChangeBranchCondition()
|
| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 139 case BGTZ: in IsForbiddenInBranchDelay()
312 case BGTZ: in InstructionType()
|
| D | constants-mips64.h | 287 BGTZ = ((0 << 3) + 7) << kOpcodeShift, enumerator
|
| D | assembler-mips64.cc | 481 opcode == BGTZ || in IsBranch()
1203 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1241 GenInstrImmediate(BGTZ, rs, rt, offset); in bltuc()
1317 GenInstrImmediate(BGTZ, rt, rt, offset); in bltzalc()
1324 GenInstrImmediate(BGTZ, zero_reg, rt, offset); in bgtzalc()
|
| D | disasm-mips64.cc | 1183 case BGTZ: in DecodeTypeImmediate()
|
| D | simulator-mips64.cc | 2937 case BGTZ: in DecodeTypeImmediate()
3086 case BGTZ: in DecodeTypeImmediate()
|
| D | macro-assembler-mips64.cc | 6053 opcode == BGTZ || in ChangeBranchCondition()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 341 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc()
344 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc()
423 return (Opc == Mips::BEQ || Opc == Mips::BNE || Opc == Mips::BGTZ || in getAnalyzableBrOpc()
|
| D | MipsFastISel.cpp | 830 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
|
| D | MipsInstrInfo.td | 1298 def BGTZ : MMRel, CBranchZero<"bgtz", brtarget, setgt, GPR32Opnd>,
|
| /external/pcre/dist/sljit/ |
| D | sljitNativeMIPS_common.c | 110 #define BGTZ (HI(7)) macro
1797 inst = BGTZ; in sljit_emit_cmp()
1827 inst = BGTZ; in sljit_emit_cmp()
|
| /external/valgrind/none/tests/mips32/ |
| D | branches.stdout.exp | 144 BGTZ
|
| /external/valgrind/none/tests/mips64/ |
| D | branches.stdout.exp | 144 --- BGTZ --- if RSval > 0 then out = RDval + 1 else out = RDval + 6
|
| D | branch_and_jump_instructions.stdout.exp | 566 --- BGTZ --- if RSval > 0 then out = RDval + 1 else out = RDval + 9
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 691 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1269 case Mips::BGTZ: in processInstruction()
|