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Searched refs:BRW_GET_SWZ (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_vec4_copy_propagation.cpp190 s[i] = BRW_GET_SWZ(values[i]->swizzle, in try_copy_propagation()
191 BRW_GET_SWZ(inst->src[arg].swizzle, i)); in try_copy_propagation()
275 values[c] = cur_value[reg][BRW_GET_SWZ(inst->src[i].swizzle, c)]; in opt_copy_propagation()
Dbrw_vec4.cpp505 int sx = BRW_GET_SWZ(inst->src[i].swizzle, 0) + new_chan[src]; in pack_uniform_registers()
506 int sy = BRW_GET_SWZ(inst->src[i].swizzle, 1) + new_chan[src]; in pack_uniform_registers()
507 int sz = BRW_GET_SWZ(inst->src[i].swizzle, 2) + new_chan[src]; in pack_uniform_registers()
508 int sw = BRW_GET_SWZ(inst->src[i].swizzle, 3) + new_chan[src]; in pack_uniform_registers()
733 int chan = BRW_GET_SWZ(inst->src[0].swizzle, i); in opt_compute_to_mrf()
Dbrw_eu.h46 #define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) macro
675 reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), in brw_swizzle()
676 BRW_GET_SWZ(reg.dw1.bits.swizzle, y), in brw_swizzle()
677 BRW_GET_SWZ(reg.dw1.bits.swizzle, z), in brw_swizzle()
678 BRW_GET_SWZ(reg.dw1.bits.swizzle, w)); in brw_swizzle()
Dbrw_vec4_visitor.cpp1395 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.x); in visit()
1398 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.y); in visit()
1401 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.z); in visit()
1404 swizzle[i] = BRW_GET_SWZ(src.swizzle, ir->mask.w); in visit()
1632 if (BRW_GET_SWZ(src.swizzle, i) != i) in try_rewrite_rhs_to_dst()
1697 first_enabled_chan = BRW_GET_SWZ(src.swizzle, i); in visit()
1710 swizzles[i] = BRW_GET_SWZ(src.swizzle, src_chan++); in visit()
1940 src.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(src.swizzle, j), in visit()
1941 BRW_GET_SWZ(src.swizzle, j), in visit()
1942 BRW_GET_SWZ(src.swizzle, j), in visit()
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Dbrw_eu_emit.c297 insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); in brw_set_src0()
298 insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); in brw_set_src0()
299 insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); in brw_set_src0()
300 insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); in brw_set_src0()
368 insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); in brw_set_src1()
369 insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); in brw_set_src1()
370 insn->bits3.da16.src1_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); in brw_set_src1()
371 insn->bits3.da16.src1_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); in brw_set_src1()
758 return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0); in get_3src_subreg_nr()
Dbrw_vec4_reg_allocate.cpp341 temp.writemask |= (1 << BRW_GET_SWZ(inst->src[i].swizzle, c)); in spill_reg()