Searched refs:CMN (Results 1 – 25 of 25) sorted by relevance
| /external/libhevc/common/arm64/ |
| D | ihevc_mem_fns.s | 117 CMN x2,#8
189 CMN x2,#8
262 CMN x2,#8
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| /external/sonivox/arm-wt-22k/lib_src/ |
| D | ARM-E_mastergain_gnu.s | 81 CMN r4, r6 @check for negative saturation
90 CMN r5, r6 @check for negative saturation
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| /external/sonivox/arm-hybrid-22k/lib_src/ |
| D | ARM-E_mastergain_gnu.s | 81 CMN r4, r6 @check for negative saturation
90 CMN r5, r6 @check for negative saturation
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| /external/v8/src/arm/ |
| D | constants-arm.h | 141 CMN = 11 << 21, // Compare Negated. enumerator
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| D | disasm-arm.cc | 915 case CMN: { in DecodeType01()
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| D | simulator-arm.cc | 2415 case CMN: { in DecodeType01()
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| D | assembler-arm.cc | 1454 addrmod1(cond | CMN | S, src1, r0, src2); in cmn()
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 122 # CMN
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| D | basic-arm-instructions.txt | 420 # CMN
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| D | thumb2.txt | 301 # CMN
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 56 CMN, // ARM CMN instructions. enumerator
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| D | README.txt | 582 The CMN instruction sets the flags like an ADD instruction, while CMP sets
583 them like a subtract. Therefore to be able to use CMN for comparisons other
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| D | ARMInstrThumb.td | 937 // CMN register
939 //FIXME: Disable CMN, as CCodes are backwards from compare expectations
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| D | ARMInstrInfo.td | 142 def ARMcmn : SDNode<"ARMISD::CMN", SDT_ARMCmp,
4312 // CMN register-integer
4329 // CMN register-register/shift
5607 // Same for CMP <--> CMN via mod_imm_neg
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| D | ARMInstrThumb2.td | 4694 // Same for CMP <--> CMN via t2_so_imm_neg
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| D | ARMISelLowering.cpp | 1024 case ARMISD::CMN: return "ARMISD::CMN"; in getTargetNodeName()
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| /external/llvm/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 210 @ CMN
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| D | thumb2-narrow-dp.ll | 635 // CMN - only two register version available
807 // CMN - only two register version available
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| D | basic-thumb2-instructions.s | 386 @ CMN
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| D | basic-arm-instructions.s | 677 @ CMN
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| D | v8_IT_manual.s | 256 @ CMN reg, encoding T1
260 @ CMN reg, encoding T2 (32-bit)
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-aliases.s | 58 ; ADDS to WZR/XZR is a CMN
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 140 // Aliases: CMN, CMP, TST
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| /external/vixl/doc/ |
| D | supported-instructions.md | 302 ### CMN ### subsection
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 60 # These should really be CMN
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