Searched refs:CRRegs (Results 1 – 3 of 3) sorted by relevance
56 static const unsigned CRRegs[] = { variable189 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRCRegisterClass()195 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRC0RegisterClass()343 Inst.addOperand(MCOperand::CreateReg(CRRegs[7 - Zeros])); in decodeCRBitMOperand()
10 ; %vreg0 (CRRegs) = TFCR %vreg0 (IntRegs)12 ; %vreg1 (CRRegs) = TFCR %vreg1 (IntRegs)14 ; The scheduler would move the CRRegs to the top of the loop. The allocator15 ; would try to spill the CRRegs after running out of them. We don't have code to16 ; spill CRRegs and the above assertion would be triggered.
155 static const MCPhysReg CRRegs[8] = { variable602 Inst.addOperand(MCOperand::CreateReg(CRRegs[getCCReg()])); in addRegCRRCOperands()607 Inst.addOperand(MCOperand::CreateReg(CRRegs[getCRBitMask()])); in addCRBitMaskOperands()1194 RegNo = CRRegs[IntVal]; in MatchRegisterName()