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/external/valgrind/VEX/orig_ppc32/
Dloadsafp.orig272 … 24 91 5D 03 E4 93 9D 01 CC 91 1D 03 30 90 FD 03 58 90 DD 03 5C 90 BD 03 60 90 2B 00 00 48 00 D6 29
572 . 7C 63 21 D6 7C A8 02 A6 94 21 FF F0 90 A1 00 14 48 01 7B 5D
641 . 80 D6 00 00 93 14 01 4C 90 D4 01 50 B2 F4 01 54 56 EC 28 34 81 14 01 78 7C 8C C2 14 80 F4 01 7C 7…
1361 . 57 12 27 FE 32 D2 FF FF 7E D6 B1 10 7F 7C B0 38 40 92 02 0C
1865 . 57 36 10 3A 83 A1 00 00 38 D6 00 1E 39 60 00 00 54 C0 00 36 7F 40 00 D0 7F A1 D1 6E 3B 61 00 17 8…
2612 . 56 CB 10 3A 3A D6 00 01 7D 4B C1 2E 85 3C 00 08 2C 09 00 00 41 82 04 3C
2858 . A1 7D 00 06 7E D6 1B 78 55 60 04 7E 7F 00 C0 40 40 99 00 08
3005 . 7D 66 2A 14 81 4B 00 04 81 6A 02 24 7C CB 1A 14 38 06 FF FF 7D 20 5B 96 7D 29 59 D6 7C E3 48 50 7…
3227 …03 96 81 7C 00 38 80 7C 00 34 83 0B 00 04 82 43 00 04 82 DC 01 98 7F EC 01 D6 7F BF 70 50 57 BB 10…
4289 . 94 21 FF D0 7C 08 02 A6 93 81 00 20 7F 84 19 D6 93 A1 00 24 93 61 00 1C 7C 7B 1B 78 90 01 00 34 5…
[all …]
/external/clang/test/CXX/special/class.copy/
Dp23-cxx11.cpp118 struct D6 { struct
119D6 &operator=(D6 &&) = default; // expected-note {{here}} expected-note {{copy assignment operator…
135 template struct MoveAssign<D6>; // expected-note {{here}} argument
136 template struct MoveOrCopyAssign<D6>; // expected-note {{here}}
/external/libopus/win32/VS2010/
Dopus.sln16 …0A0C91BC942}") = "test_opus_api", "test_opus_api.vcxproj", "{1D257A17-D254-42E5-82D6-1C87A6EC775A}"
78 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Debug|Win32.ActiveCfg = Debug|Win32
79 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Debug|Win32.Build.0 = Debug|Win32
80 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Debug|x64.ActiveCfg = Debug|x64
81 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Debug|x64.Build.0 = Debug|x64
82 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Release|Win32.ActiveCfg = Release|Win32
83 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Release|Win32.Build.0 = Release|Win32
84 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Release|x64.ActiveCfg = Release|x64
85 {1D257A17-D254-42E5-82D6-1C87A6EC775A}.Release|x64.Build.0 = Release|x64
/external/llvm/unittests/Support/
DAlignOfTest.cpp58 struct D6 : S2, S3 {}; struct
124 [AlignOf<D6>::Alignment > 0]
165 EXPECT_LE(alignOf<S1>(), alignOf<D6>()); in TEST()
243 EXPECT_EQ(alignOf<D6>(), alignOf<AlignedCharArrayUnion<D6> >()); in TEST()
298 EXPECT_EQ(sizeof(D6), sizeof(AlignedCharArrayUnion<D6>)); in TEST()
/external/libhevc/common/arm/
Dihevc_sao_band_offset_chroma.s127 …VADD.I8 D6,D2,D31 @band_table_u.val[1] = vadd_u8(band_table_u.val[1], sao_ba…
145 …VADD.I8 D2,D6,D28 @band_table_u.val[1] = vadd_u8(band_table_u.val[1], vdup_n…
286 VLD2.8 {D5,D6},[r4] @vld1q_u8(pu1_src_cpy)
293 VSUB.I8 D8,D6,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
301 …VTBX.8 D6,{D9-D12},D8 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
310 VST2.8 {D5,D6},[r4] @vst1q_u8(pu1_src_cpy, au1_cur_row)
339 VLD2.8 {D5,D6},[r4] @vld1q_u8(pu1_src_cpy)
347 VSUB.I8 D8,D6,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
352 …VTBX.8 D6,{D9-D12},D8 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
362 VZIP.8 D5,D6
Dihevc_sao_edge_offset_class1.s111 VLD1.8 D6,[r14] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
165 VTBL.8 D12,{D6},D12 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
169 VTBL.8 D13,{D6},D13 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
179 VTBL.8 D22,{D6},D22 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
183 VTBL.8 D23,{D6},D23 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
233 VTBL.8 D22,{D6},D22 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
234 VTBL.8 D23,{D6},D23 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
307 VTBL.8 D12,{D6},D12 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
318 VTBL.8 D22,{D6},D22 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
352 VTBL.8 D22,{D6},D22 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
Dihevc_sao_edge_offset_class1_chroma.s115 VLD1.8 D6,[r14] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
170 VTBL.8 D12,{D6},D12 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
174 VTBL.8 D13,{D6},D13 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
188 VTBL.8 D22,{D6},D22 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
192 VTBL.8 D23,{D6},D23 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
246 VTBL.8 D22,{D6},D22 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
247 VTBL.8 D23,{D6},D23 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
325 VTBL.8 D12,{D6},D12 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
343 VTBL.8 D22,{D6},D22 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
383 VTBL.8 D22,{D6},D22 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
Dihevc_sao_edge_offset_class2.s199 VLD1.8 D6,[r11] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
300 VTBL.8 D18,{D6},D24 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
301 VTBL.8 D19,{D6},D25 @I vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
382 VTBL.8 D22,{D6},D22 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
386 VTBL.8 D23,{D6},D23 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
397 VTBL.8 D18,{D6},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
401 VTBL.8 D19,{D6},D19 @III vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
473 VTBL.8 D18,{D6},D18 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
476 VTBL.8 D19,{D6},D19 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
613 VTBL.8 D26,{D6},D26 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
[all …]
Dihevc_sao_edge_offset_class3.s215 VLD1.8 D6,[r6] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
314 VTBL.8 D18,{D6},D18 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
318 VTBL.8 D19,{D6},D19 @I vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
409 VTBL.8 D26,{D6},D26 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
413 VTBL.8 D27,{D6},D27 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
428 VTBL.8 D18,{D6},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
432 VTBL.8 D19,{D6},D19 @III vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
513 VTBL.8 D26,{D6},D26 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
514 VTBL.8 D27,{D6},D27 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
654 VTBL.8 D26,{D6},D26 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
[all …]
Dihevc_sao_band_offset_luma.s121 … VADD.I8 D6,D2,D31 @band_table.val[1] = vadd_u8(band_table.val[1], band_pos)
133 …VADD.I8 D2,D6,D28 @band_table.val[1] = vadd_u8(band_table.val[1], vdup_n_u8(…
/external/llvm/test/CodeGen/AArch64/
Dfp16-v16-instructions.ll30 ; CHECK-DAG: scvtf [[D6:v[0-9]+\.2d]], v6.2d
36 ; CHECK-DAG: fcvtn [[S3:v[0-9]+]].2s, [[D6]]
81 ; CHECK-DAG: ucvtf [[D6:v[0-9]+\.2d]], v6.2d
87 ; CHECK-DAG: fcvtn [[S3:v[0-9]+]].2s, [[D6]]
/external/icu/icu4c/source/test/testdata/
DLineBreakTest.txt121 × 0023 × 17D6 ÷ # × [0.3] NUMBER SIGN (AL) × [21.03] KHMER SIGN CAMNUC PII KUUH (NS) ÷ [0.3]
122 × 0023 × 0020 ÷ 17D6 ÷ # × [0.3] NUMBER SIGN (AL) × [7.01] SPACE (SP) ÷ [18.0] KHMER SIGN CAMNUC P…
123 × 0023 × 0308 × 17D6 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [21.03] KHMER…
124 × 0023 × 0308 × 0020 ÷ 17D6 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [7.01]…
277 × 2014 × 17D6 ÷ # × [0.3] EM DASH (B2) × [21.03] KHMER SIGN CAMNUC PII KUUH (NS) ÷ [0.3]
278 × 2014 × 0020 ÷ 17D6 ÷ # × [0.3] EM DASH (B2) × [7.01] SPACE (SP) ÷ [18.0] KHMER SIGN CAMNUC PII K…
279 × 2014 × 0308 × 17D6 ÷ # × [0.3] EM DASH (B2) × [9.0] COMBINING DIAERESIS (CM) × [21.03] KHMER SIG…
280 × 2014 × 0308 × 0020 ÷ 17D6 ÷ # × [0.3] EM DASH (B2) × [9.0] COMBINING DIAERESIS (CM) × [7.01] SPA…
433 × 0009 × 17D6 ÷ # × [0.3] <CHARACTER TABULATION> (BA) × [21.03] KHMER SIGN CAMNUC PII KUUH (NS) ÷ …
434 × 0009 × 0020 ÷ 17D6 ÷ # × [0.3] <CHARACTER TABULATION> (BA) × [7.01] SPACE (SP) ÷ [18.0] KHMER SI…
[all …]
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/
Dde-DE_gl0_kdt_mgc5.pkb26 …��8$PC�r%���b�s������% ��@�EN*���;���q��A_�"W�j�vd����[<2��;D6��1�`E��a!��z� a…
33 �w��ct��ɻ���ٳ��!7��yb��j�=�����9�I��8nn�ôC`,�9�h��<⣣0���#;��;D6�m��`E��a!����a���…
/external/llvm/test/CodeGen/ARM/
D2013-04-16-AAPCS-C5-vs-VFP.ll29 double %p6, ; --> D6
54 double 23.6, ; --> D6
D2013-04-16-AAPCS-C4-vs-VFP.ll70 double %p6, ; --> D6
89 double 23.6, ; --> D6
D2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll14 double %vfp6, ; --> D6, NSAA=SP
D2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll16 double %vfp6, ; --> D6, NSAA=SP
/external/valgrind/VEX/orig_x86/
Dfpu_mmx_sse.orig24 . B8 21 00 00 70 29 D0 89 34 87 83 C6 08 8B 06 85 C0 89 C2 75 D6
648D6 FF FF 89 45 EC 8B 45 E8 8D BB 17 F0 FF FF C7 45 D8 00 00 00 00 C1 E0 02 89 7D E0 89 45 E4 89 16…
663 . 89 16 8B 7D E0 83 C6 04 C7 42 08 00 00 00 00 8B 45 EC 89 7A 04 8B 7D D8 89 42 0C 8B BC BB 14 D6 F…
795 . 8B 4D E4 8B 7D D8 80 7C 0F FF 2F 0F 84 D6 00 00 00
903 . 8D 93 2C D6 FF FF 89 55 E4 83 7D D8 01 76 11
936 . 8B 83 78 FB FF FF 8B 50 1C 89 C6 01 D6 0F B7 50 2C 89 B3 28 FB FF FF 66 89 93 30 FB FF FF 0F B7 5…
951 . 89 34 24 8D BD 3C FF FF FF E8 E8 D6 00 00
984 . 55 89 E5 57 89 C7 56 89 D6 53 83 EC 08 8B 42 04 E8 96 4D 00 00
1047 . 57 56 53 55 8B 44 24 14 8B 54 24 18 89 C7 31 C9 88 D6 88 D1 C1 E2 10 88 CD 09 CA 83 E7 03 74 41
1197 . FC 8B 75 B8 B9 09 00 00 00 8D BB 2F D6 FF FF F3 A6
[all …]
/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_rgba8888.s195 VMULL.S16 Q10,D6,D0[0] @//(V-128)*C1 FOR R
199 VMLAL.S16 Q6,D6,D0[2] @//Q6 = (U-128)*C2 + (V-128)*C3
326 VMULL.S16 Q10,D6,D0[0] @//(V-128)*C1 FOR R
330 VMLAL.S16 Q6,D6,D0[2] @//Q6 = (U-128)*C2 + (V-128)*C3
/external/apache-commons-math/src/main/java/org/apache/commons/math/ode/nonstiff/
DDormandPrince54StepInterpolator.java72 private static final double D6 = 69997945.0 / 29380423.0; field in DormandPrince54StepInterpolator
193 v4[i] = D0 * yDot0 + D2 * yDot2 + D3 * yDot3 + D4 * yDot4 + D5 * yDot5 + D6 * yDot6; in computeInterpolatedStateAndDerivatives()
/external/llvm/test/TableGen/
DBitsInit.td36 bits<1> D6 = { 1 }; // ok
71 // CHECK: bits<1> D6 = { 1 };
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td63 CCIfType<[f64], CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
66 CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
99 CCIfType<[f64], CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
102 CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
144 CCIfType<[f64], CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
147 CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
203 CCIfType<[f64], CCAssignToRegWithShadow<[D0, D1, D2, D3, D4, D5, D6, D7],
/external/llvm/lib/Target/ARM/
DARMCallingConv.td64 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
83 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
181 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
193 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
/external/llvm/test/MC/MachO/
Dx86_64-symbols.s23 D6: label
Dx86_32-symbols.s23 D6: label

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