| /external/llvm/include/llvm/Target/ |
| D | TargetOpcodes.h | 69 DBG_VALUE = 11, enumerator
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| D | Target.td | 805 def DBG_VALUE : Instruction {
808 let AsmString = "DBG_VALUE";
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| /external/llvm/test/CodeGen/X86/ |
| D | 2012-11-30-regpres-dbg.ll | 4 ; Test RegisterPressure handling of DBG_VALUE.
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| D | 2012-11-30-handlemove-dbg.ll | 4 ; Test LiveInterval update handling of DBG_VALUE.
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| D | stack-protector-dbginfo.ll | 6 ; DBG_VALUE MI in the terminator sequence.
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| D | 2012-11-30-misched-dbg.ll | 4 ; Test MachineScheduler handling of DBG_VALUE.
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 189 if (MInst->getOpcode() == TargetOpcode::DBG_VALUE || in EmitInstruction()
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| /external/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 217 case TargetOpcode::DBG_VALUE: in runOnMachineFunction()
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| D | LiveDebugVariables.cpp | 988 BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE), in insertDebugValue()
991 BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE)) in insertDebugValue()
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| D | RegAllocFast.cpp | 308 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE)) in spillVirtReg()
880 TII->get(TargetOpcode::DBG_VALUE)) in AllocateBasicBlock()
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| D | InlineSpiller.cpp | 1237 BuildMI(*MBB, MBB->erase(MI), DL, TII.get(TargetOpcode::DBG_VALUE)) in spillAroundUses()
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| /external/llvm/test/DebugInfo/X86/ |
| D | mi-print.ll | 6 ; CHECK: DBG_VALUE
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| D | nophysreg.ll | 3 ; PR22296: In this testcase the DBG_VALUE describing "p5" becomes unavailable
6 ; DBG_VALUE and/or is actually a stack slot.
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AsmPrinter.cpp | 378 MII->getOpcode() == AArch64::DBG_VALUE || in LowerSTACKMAP()
454 case AArch64::DBG_VALUE: { in EmitInstruction()
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| D | AArch64InstrInfo.cpp | 51 case TargetOpcode::DBG_VALUE: in GetInstSizeInBytes()
1482 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AArch64::DBG_VALUE)) in emitFrameIndexDebugValue()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 748 bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; }
819 case TargetOpcode::DBG_VALUE:
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreAsmPrinter.cpp | 271 case XCore::DBG_VALUE: in EmitInstruction()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 306 case TargetOpcode::DBG_VALUE: in GetInstSizeInBytes()
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| /external/llvm/test/CodeGen/ARM/ |
| D | coalesce-dbgvalue.ll | 5 ; by rematerialization during coalescing. It also contains a DBG_VALUE
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 814 assert(OpC != PPC::DBG_VALUE && in eliminateFrameIndex()
1029 return MI->getOpcode() == PPC::DBG_VALUE || // DBG_VALUE is always Reg+Imm in isFrameOffsetLegal()
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| D | PPCAsmPrinter.cpp | 346 MII->getOpcode() == PPC::DBG_VALUE || in LowerSTACKMAP()
450 case TargetOpcode::DBG_VALUE: in EmitInstruction()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 659 return BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE)) in EmitDbgValue()
666 const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE); in EmitDbgValue()
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| D | FastISel.cpp | 1137 TII.get(TargetOpcode::DBG_VALUE), false, Op->getReg(), 0, in selectIntrinsicCall()
1141 TII.get(TargetOpcode::DBG_VALUE)) in selectIntrinsicCall()
1156 const MCInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE); in selectIntrinsicCall()
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| D | SelectionDAGISel.cpp | 510 BuildMI(*EntryMBB, ++InsertPos, DL, TII->get(TargetOpcode::DBG_VALUE), in runOnMachineFunction()
532 BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsIndirect, in runOnMachineFunction()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 263 case TargetOpcode::DBG_VALUE: in EmitInstruction()
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