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Searched refs:Disp (Results 1 – 25 of 30) sorted by relevance

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/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp59 int64_t Disp; member
64 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
90 errs() << " Disp " << Disp; in dump()
154 SDValue &Base, SDValue &Disp) const;
156 SDValue &Base, SDValue &Disp, SDValue &Index) const;
162 SDValue &Base, SDValue &Disp) const;
168 SDValue &Base, SDValue &Disp) const;
175 SDValue &Base, SDValue &Disp, SDValue &Index) const;
187 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
188 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
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DSystemZISelLowering.cpp2970 int64_t Disp = MI->getOperand(2).getImm(); in emitCondStore() local
2976 StoreOpcode = TII->getOpcodeForOffset(StoreOpcode, Disp); in emitCondStore()
2985 .addReg(SrcReg).addOperand(Base).addImm(Disp) in emitCondStore()
3013 .addReg(SrcReg).addOperand(Base).addImm(Disp).addReg(IndexReg); in emitCondStore()
3043 int64_t Disp = MI->getOperand(2).getImm(); in emitAtomicLoadBinary() local
3059 LOpcode = TII->getOpcodeForOffset(LOpcode, Disp); in emitAtomicLoadBinary()
3060 CSOpcode = TII->getOpcodeForOffset(CSOpcode, Disp); in emitAtomicLoadBinary()
3082 .addOperand(Base).addImm(Disp).addReg(0); in emitAtomicLoadBinary()
3131 .addReg(OldVal).addReg(NewVal).addOperand(Base).addImm(Disp); in emitAtomicLoadBinary()
3162 int64_t Disp = MI->getOperand(2).getImm(); in emitAtomicLoadMinMax() local
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DSystemZOperands.td76 let Name = format##bitsize##"Disp"##dispsize##length;
100 "decode"##format##bitsize##"Disp"##dispsize##length##"Operand";
103 !cast<AddressAsmOperand>(format##bitsize##"Disp"##dispsize##length);
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp147 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
148 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
149 return (Base << 12) | Disp; in getBDAddr12Encoding()
157 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
158 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
159 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
167 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
169 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
170 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
178 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
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/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp48 int16_t Disp; member
57 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), in MSP430ISelAddressMode()
73 errs() << " Disp " << Disp << '\n'; in dump()
119 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
145 AM.Disp += G->getOffset(); in MatchWrapper()
150 AM.Disp += CP->getOffset(); in MatchWrapper()
187 AM.Disp += Val; in MatchAddress()
230 AM.Disp += Offset; in MatchAddress()
245 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
263 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
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DMSP430AsmPrinter.cpp108 const MachineOperand &Disp = MI->getOperand(OpNum+1); in printSrcMemOperand() local
113 if (Disp.isImm() && !Base.getReg()) in printSrcMemOperand()
/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp64 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
77 if (Disp.isExpr()) in printSrcMemOperand()
78 O << *Disp.getExpr(); in printSrcMemOperand()
80 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
81 O << Disp.getImm(); in printSrcMemOperand()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h50 int Disp; member
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
136 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
138 MIB.addImm(AM.Disp); in addFullAddress()
DX86ISelDAGToDAG.cpp64 int32_t Disp; member
75 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), in X86ISelAddressMode()
120 dbgs() << " Disp " << Disp << '\n' in dump()
205 SDValue &Scale, SDValue &Index, SDValue &Disp,
209 SDValue &Scale, SDValue &Index, SDValue &Disp,
212 SDValue &Scale, SDValue &Index, SDValue &Disp,
215 SDValue &Scale, SDValue &Index, SDValue &Disp,
219 SDValue &Index, SDValue &Disp,
225 SDValue &Index, SDValue &Disp,
238 SDValue &Disp, SDValue &Segment) { in getAddressOperands() argument
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DX86FastISel.cpp701 uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue(); in X86SelectAddress() local
703 if (isInt<32>(Disp)) { in X86SelectAddress()
704 AM.Disp = (uint32_t)Disp; in X86SelectAddress()
715 uint64_t Disp = (int32_t)AM.Disp; in X86SelectAddress() local
726 Disp += SL->getElementOffset(cast<ConstantInt>(Op)->getZExtValue()); in X86SelectAddress()
736 Disp += CI->getSExtValue() * S; in X86SelectAddress()
743 Disp += CI->getSExtValue() * S; in X86SelectAddress()
764 if (!isInt<32>(Disp)) in X86SelectAddress()
769 AM.Disp = (uint32_t)Disp; in X86SelectAddress()
2224 DestAM.Disp += Size; in TryEmitSmallMemcpy()
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/external/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp190 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
193 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDAddr12Operand()
200 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
203 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
211 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
214 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDXAddr12Operand()
223 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
226 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
235 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
238 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDLAddr12Len8Operand()
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp319 const MCExpr *Disp = MCConstantExpr::Create(0, Ctx); in InstrumentMOVSBase() local
321 getPointerWidth(), 0, Disp, SrcReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
328 const MCExpr *Disp = MCConstantExpr::Create(-1, Ctx); in InstrumentMOVSBase() local
330 getPointerWidth(), 0, Disp, SrcReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
338 const MCExpr *Disp = MCConstantExpr::Create(0, Ctx); in InstrumentMOVSBase() local
340 getPointerWidth(), 0, Disp, DstReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
346 const MCExpr *Disp = MCConstantExpr::Create(-1, Ctx); in InstrumentMOVSBase() local
348 getPointerWidth(), 0, Disp, DstReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
464 const MCConstantExpr *Disp = in ComputeMemOperandAddress() local
467 X86Operand::CreateMem(getPointerWidth(), 0, Disp, Reg, 0, 1, SMLoc(), in ComputeMemOperandAddress()
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DX86AsmParser.cpp662 bool ParseIntelDotOperator(const MCExpr *Disp, const MCExpr *&NewDisp);
681 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
975 const MCExpr *Disp = MCConstantExpr::Create(0, getContext()); in DefaultMemSIOperand() local
976 return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp, in DefaultMemSIOperand()
984 const MCExpr *Disp = MCConstantExpr::Create(0, getContext()); in DefaultMemDIOperand() local
985 return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp, in DefaultMemDIOperand()
1013 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1018 if (isa<MCSymbolRefExpr>(Disp) && Info.OpDecl && !Info.IsVarDecl) { in CreateMemForInlineAsm()
1028 return X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size, in CreateMemForInlineAsm()
1035 const MCBinaryExpr *BinOp = dyn_cast<MCBinaryExpr>(Disp); in CreateMemForInlineAsm()
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DX86Operand.h51 const MCExpr *Disp; member
106 return Mem.Disp; in getMemDisp()
477 CreateMem(unsigned ModeSize, const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
482 Res->Mem.Disp = Disp;
496 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
509 Res->Mem.Disp = Disp;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp62 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in Is16BitMemOperand() local
65 Disp.isImm() && Disp.getImm() < 0x10000) in Is16BitMemOperand()
122 void EmitImmediate(const MCOperand &Disp, SMLoc Loc,
368 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in EmitMemModRMByte() local
396 EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind), in EmitMemModRMByte()
440 if (Disp.isImm() && isDisp8(Disp.getImm())) { in EmitMemModRMByte()
441 if (Disp.getImm() == 0 && BaseRegNo != N86::EBP) { in EmitMemModRMByte()
448 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups); in EmitMemModRMByte()
459 EmitImmediate(Disp, MI.getLoc(), 2, FK_Data_2, CurByte, OS, Fixups); in EmitMemModRMByte()
480 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups); in EmitMemModRMByte()
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/external/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp96 const MCExpr *Disp; member
161 createMem(RegisterKind RegKind, unsigned Base, const MCExpr *Disp, in createMem() argument
168 Op->Mem.Disp = Disp; in createMem()
236 return isMem(RegKind, MemKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12()
239 return isMem(RegKind, MemKind) && inRange(Mem.Disp, -524288, 524287); in isMemDisp20()
269 addExpr(Inst, Mem.Disp); in addBDAddrOperands()
275 addExpr(Inst, Mem.Disp); in addBDXAddrOperands()
282 addExpr(Inst, Mem.Disp); in addBDLAddrOperands()
349 bool parseAddress(unsigned &Base, const MCExpr *&Disp,
531 bool SystemZAsmParser::parseAddress(unsigned &Base, const MCExpr *&Disp, in parseAddress() argument
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/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h204 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
206 switch (Disp.getType()) {
210 return addImm(Disp.getImm() + off);
217 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
219 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
220 Disp.getTargetFlags());
/external/llvm/lib/Target/SystemZ/InstPrinter/
DSystemZInstPrinter.cpp22 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp, in printAddress() argument
24 O << Disp; in printAddress()
173 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDLAddrOperand() local
175 O << Disp << '(' << Length; in printBDLAddrOperand()
DSystemZInstPrinter.h34 static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
/external/llvm/tools/llvm-objdump/
DCOFFDump.cpp225 uint64_t Offset, uint32_t Disp) { in printCOFFSymbolAddress() argument
229 if (Disp > 0) in printCOFFSymbolAddress()
230 Out << format(" + 0x%04x", Disp); in printCOFFSymbolAddress()
232 Out << format("0x%04x", Disp); in printCOFFSymbolAddress()
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp286 uint64_t Disp = Imm & 0xFFFF; in decodeMemRIOperands() local
310 Inst.addOperand(MCOperand::CreateImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
321 uint64_t Disp = Imm & 0x3FFF; in decodeMemRIXOperands() local
331 Inst.addOperand(MCOperand::CreateImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
/external/llvm/lib/Target/Mips/
DMipsConstantIslandPass.cpp387 unsigned Disp, bool NegativeOK);
406 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
410 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
/external/llvm/lib/Target/AArch64/
DAArch64BranchRelaxation.cpp87 bool isBlockInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
/external/llvm/lib/Target/ARM/
DARMConstantIslandPass.cpp296 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
300 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
320 unsigned Disp, bool NegativeOK, bool IsSoImm = false);
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h442 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,

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