Searched refs:ExtVT (Results 1 – 8 of 8) sorted by relevance
/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.h | 133 EVT ExtVT) const override;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 2993 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); in visitAND() local 2997 if (ExtVT == LoadedVT && in visitAND() 2999 ExtVT))) { in visitAND() 3003 LN0->getChain(), LN0->getBasePtr(), ExtVT, in visitAND() 3013 if (!LN0->isVolatile() && LoadedVT.bitsGT(ExtVT) && ExtVT.isRound() && in visitAND() 3015 ExtVT))) { in visitAND() 3026 unsigned EVTStoreBytes = ExtVT.getStoreSize(); in visitAND() 3039 ExtVT, LN0->isVolatile(), LN0->isNonTemporal(), in visitAND() 4355 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), LowBits); in visitSRA() local 4357 ExtVT = EVT::getVectorVT(*DAG.getContext(), in visitSRA() [all …]
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D | LegalizeVectorTypes.cpp | 262 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() local 265 LHS, DAG.getValueType(ExtVT)); in ScalarizeVecRes_InregOp() 2098 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in WidenVecRes_InregOp() local 2104 WidenVT, WidenLHS, DAG.getValueType(ExtVT)); in WidenVecRes_InregOp()
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D | LegalizeIntegerTypes.cpp | 2795 EVT ExtVT = N->getMemoryVT(); in ExpandIntOp_STORE() local 2796 unsigned EBytes = ExtVT.getStoreSize(); in ExpandIntOp_STORE() 2800 ExtVT.getSizeInBits() - ExcessBits); in ExpandIntOp_STORE()
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D | SelectionDAG.cpp | 6622 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); in UnrollVectorOp() local 6625 getValueType(ExtVT))); in UnrollVectorOp()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 5615 MVT ExtVT = VT.getVectorElementType(); in LowerBUILD_VECTOR() local 5646 unsigned EVTBits = ExtVT.getSizeInBits(); in LowerBUILD_VECTOR() 5683 if (ExtVT == MVT::i64 && !Subtarget->is64Bit() && in LowerBUILD_VECTOR() 5708 if (ExtVT == MVT::i32 || ExtVT == MVT::f32 || ExtVT == MVT::f64 || in LowerBUILD_VECTOR() 5709 (ExtVT == MVT::i64 && Subtarget->is64Bit())) { in LowerBUILD_VECTOR() 5724 if (ExtVT == MVT::i16 || ExtVT == MVT::i8) { in LowerBUILD_VECTOR() 5801 EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2); in LowerBUILD_VECTOR() 6747 MVT ExtVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits * Scale), in lowerVectorShuffleAsSpecificZeroOrAnyExtend() local 6750 DAG.getNode(X86ISD::VZEXT, DL, ExtVT, InputV)); in lowerVectorShuffleAsSpecificZeroOrAnyExtend() 6951 MVT ExtVT = VT; in lowerVectorShuffleAsElementInsertion() local [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 7252 EVT ExtVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG() local 7253 if (ExtVT != MVT::v2i32) { in LowerSIGN_EXTEND_INREG() 7257 ExtVT.getVectorElementType(), 4))); in LowerSIGN_EXTEND_INREG()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 1580 MVT ExtVT = in LowerVectorFP_TO_INT() local 1583 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
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