Searched refs:FCMGE (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 129 FCMGE, enumerator
|
| D | AArch64SchedA57.td | 432 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FACGE|FACGT|FCMEQ|FCMGE|FCMGT|FCMLE|FCMLT)(v2f32|32|…
434 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FACGE|FACGT|FCMEQ|FCMGE|FCMGT|FCMLE|FCMLT)(v4f32|v2f…
|
| D | AArch64InstrInfo.td | 216 def AArch64fcmge: SDNode<"AArch64ISD::FCMGE", SDT_AArch64fcmp>;
2556 defm FCMGE : SIMDFPCmpTwoVector<1, 1, 0b01100, "fcmge", AArch64fcmgez>;
2719 defm FCMGE : SIMDThreeSameVectorFPCmp<1, 0, 0b11100, "fcmge", AArch64fcmge>;
2995 defm FCMGE : SIMDThreeScalarFPCmp<1, 0, 0b11100, "fcmge", AArch64fcmge>;
3083 defm FCMGE : SIMDCmpTwoScalarSD<1, 1, 0b01100, "fcmge", AArch64fcmgez>;
|
| D | AArch64ISelLowering.cpp | 842 case AArch64ISD::FCMGE: return "AArch64ISD::FCMGE"; in getTargetNodeName()
6322 return DAG.getNode(AArch64ISD::FCMGE, dl, VT, LHS, RHS); in EmitVectorComparison()
6330 return DAG.getNode(AArch64ISD::FCMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 1761 ### FCMGE ### subsection
1770 ### FCMGE ### subsection
|