| /external/v8/test/cctest/ |
| D | test-assembler-mips.cc | 1172 __ cfc1(a1, FCSR); in TEST()
1174 __ ctc1(zero_reg, FCSR); in TEST()
1193 __ ctc1(zero_reg, FCSR); \ in TEST()
1195 __ cfc1(a2, FCSR); \ in TEST()
1199 __ ctc1(zero_reg, FCSR); \ in TEST()
1201 __ cfc1(a2, FCSR); \ in TEST()
1205 __ ctc1(zero_reg, FCSR); \ in TEST()
1207 __ cfc1(a2, FCSR); \ in TEST()
1211 __ ctc1(zero_reg, FCSR); \ in TEST()
1213 __ cfc1(a2, FCSR); \ in TEST()
[all …]
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| D | test-assembler-mips64.cc | 1183 __ cfc1(a1, FCSR); in TEST()
1185 __ ctc1(zero_reg, FCSR); in TEST()
1204 __ ctc1(zero_reg, FCSR); \ in TEST()
1206 __ cfc1(a2, FCSR); \ in TEST()
1210 __ ctc1(zero_reg, FCSR); \ in TEST()
1212 __ cfc1(a2, FCSR); \ in TEST()
1216 __ ctc1(zero_reg, FCSR); \ in TEST()
1218 __ cfc1(a2, FCSR); \ in TEST()
1222 __ ctc1(zero_reg, FCSR); \ in TEST()
1224 __ cfc1(a2, FCSR); \ in TEST()
[all …]
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 1530 cfc1(scratch, FCSR); in Movt()
1556 cfc1(scratch, FCSR); in Movf()
1623 cfc1(scratch, FCSR); in EmitFPUTruncate()
1625 ctc1(zero_reg, FCSR); in EmitFPUTruncate()
1644 cfc1(except_flag, FCSR); in EmitFPUTruncate()
1646 ctc1(scratch, FCSR); in EmitFPUTruncate()
1665 cfc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
1666 ctc1(zero_reg, FCSR); in TryInlineTruncateDoubleToI()
1671 cfc1(scratch, FCSR); in TryInlineTruncateDoubleToI()
1672 ctc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
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| D | assembler-mips.h | 356 const FPUControlRegister FCSR = { kFCSRRegister }; variable
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| D | code-stubs-mips.cc | 159 __ cfc1(scratch2, FCSR); in Generate()
160 __ ctc1(zero_reg, FCSR); in Generate()
168 __ cfc1(scratch, FCSR); in Generate()
169 __ ctc1(scratch2, FCSR); in Generate()
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 1672 cfc1(scratch, FCSR); in EmitFPUTruncate()
1674 ctc1(zero_reg, FCSR); in EmitFPUTruncate()
1693 cfc1(except_flag, FCSR); in EmitFPUTruncate()
1695 ctc1(scratch, FCSR); in EmitFPUTruncate()
1714 cfc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
1715 ctc1(zero_reg, FCSR); in TryInlineTruncateDoubleToI()
1720 cfc1(scratch, FCSR); in TryInlineTruncateDoubleToI()
1721 ctc1(scratch2, FCSR); in TryInlineTruncateDoubleToI()
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| D | code-stubs-mips64.cc | 157 __ cfc1(scratch2, FCSR); in Generate()
158 __ ctc1(zero_reg, FCSR); in Generate()
166 __ cfc1(scratch, FCSR); in Generate()
167 __ ctc1(scratch2, FCSR); in Generate()
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| D | assembler-mips64.h | 345 const FPUControlRegister FCSR = { kFCSRRegister }; variable
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| /external/valgrind/none/tests/mips32/ |
| D | round.stdout.exp | 386 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| D | round_fpu64.stdout.exp | 1 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| /external/valgrind/memcheck/ |
| D | mc_machine.c | 1100 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */ in get_otrack_shadow_offset_wrk()
1188 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */ in get_otrack_shadow_offset_wrk()
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| /external/valgrind/none/tests/mips64/ |
| D | round.stdout.exp | 722 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
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| /external/robolectric/lib/main/ |
| D | sqlite-jdbc-3.7.2.jar | META-INF/
META-INF/MANIFEST.MF
META-INF/maven/
META- ... |