Searched refs:FPTieEven (Results 1 – 8 of 8) sorted by relevance
| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 2254 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2255 case FCVTNS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2256 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2257 case FCVTNS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2258 case FCVTNU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2259 case FCVTNU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2260 case FCVTNU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2261 case FCVTNU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2466 case FRINTN_s: set_sreg(fd, FPRoundInt(sreg(fn), FPTieEven)); break; in VisitFPDataProcessing1Source()
2467 case FRINTN_d: set_dreg(fd, FPRoundInt(dreg(fn), FPTieEven)); break; in VisitFPDataProcessing1Source()
[all …]
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| D | instructions-arm64.h | 80 FPTieEven = 0x0, enumerator
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| D | simulator-arm64.h | 827 DCHECK(fpcr().RMode() == FPTieEven); // Ties-to-even rounding only.
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| D | macro-assembler-arm64.cc | 1355 STATIC_ASSERT(FPTieEven == 0); in AssertFPCRState()
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 2031 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2032 case FCVTNS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2033 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2034 case FCVTNS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2035 case FCVTNU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2036 case FCVTNU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2037 case FCVTNU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2038 case FCVTNU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert()
2235 case FCVT_sd: set_sreg(fd, FPToFloat(dreg(fn), FPTieEven)); return; in VisitFPDataProcessing1Source()
2236 case FCVT_hs: set_hreg(fd, FPToFloat16(sreg(fn), FPTieEven)); return; in VisitFPDataProcessing1Source()
[all …]
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| D | simulator-a64.h | 174 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
248 if (round_mode == FPTieEven) { in FPRound()
282 if (round_mode == FPTieEven) { in FPRound()
303 if (round_mode == FPTieEven) { in FPRound()
2627 VIXL_ASSERT(fpcr().RMode() == FPTieEven); // Ties-to-even rounding only. in AssertSupportedFPCR()
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| D | instructions-a64.h | 145 FPTieEven = 0x0, enumerator
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| D | logic-a64.cc | 232 VIXL_ASSERT(round_mode == FPTieEven); in FPToFloat16()
282 VIXL_ASSERT(round_mode == FPTieEven); in FPToFloat16()
332 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
3771 case FPTieEven: { in FPRoundInt()
4466 dst.SetFloat(i, FPToFloat16(src.Float<float>(i), FPTieEven)); in fcvtn()
4471 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPTieEven)); in fcvtn()
4484 dst.SetFloat(i + lane_count, FPToFloat16(src.Float<float>(i), FPTieEven)); in fcvtn2()
4489 dst.SetFloat(i + lane_count, FPToFloat(src.Float<double>(i), FPTieEven)); in fcvtn2()
4645 case FPTieEven: overflow_to_inf = true; break; in FPRecipEstimate()
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