Searched refs:FloatVT (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 1566 EVT FloatVT = Tmp2.getValueType(); in ExpandFCOPYSIGN() local 1567 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), FloatVT.getSizeInBits()); in ExpandFCOPYSIGN() 1575 SDValue StackPtr = DAG.CreateStackTemporary(FloatVT, LoadTy); in ExpandFCOPYSIGN() 1581 assert(FloatVT.isByteSized() && "Unsupported floating point type!"); in ExpandFCOPYSIGN() 1589 unsigned Strides = (FloatVT.getSizeInBits()-1)/LoadTy.getSizeInBits(); in ExpandFCOPYSIGN() 1598 (FloatVT.getSizeInBits() - 8 * ByteOffset); in ExpandFCOPYSIGN()
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/external/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 89 // Note: For EltSize < 32, FloatVT is illegal and TableGen 90 // fails to compile, so we choose FloatVT = VT 91 ValueType FloatVT = !cast<ValueType>( 4456 (_.FloatVT (OpNode _.RC:$src))>, EVEX, T8PD; 4460 (OpNode (_.FloatVT 4465 (OpNode (_.FloatVT 4563 (OpNode (_.FloatVT 4569 (OpNode (_.FloatVT 4592 (_.FloatVT (OpNode _.RC:$src))>, EVEX; 4596 (OpNode (_.FloatVT [all …]
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/external/llvm/lib/Target/R600/ |
D | SIISelLowering.cpp | 1294 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f32, NElts); in performUCharToFloatCombine() local 1343 return DAG.getNode(ISD::BUILD_VECTOR, DL, FloatVT, Ops); in performUCharToFloatCombine()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 8571 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, NumElts); in PerformBUILD_VECTORCombine() local 8572 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops); in PerformBUILD_VECTORCombine() 8682 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, in PerformInsertEltCombine() local 8684 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine() 8689 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine() 9210 EVT FloatVT = EVT::getVectorVT(*DAG.getContext(), MVT::f64, in PerformSTORECombine() local 9212 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 333 class fixedpoint_i32<ValueType FloatVT> 334 : Operand<FloatVT>, 335 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<32>", [fpimm, ld]> { 341 class fixedpoint_i64<ValueType FloatVT> 342 : Operand<FloatVT>, 343 ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<64>", [fpimm, ld]> {
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