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Searched refs:GPR_64 (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsCondMov.td208 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
210 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
212 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
214 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
216 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
218 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
220 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
222 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
224 INSN_MIPS4_32_NOT_32R6_64R6, GPR_64;
229 GPR_64;
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DMips64r6InstrInfo.td104 def SELEQZ64 : SELEQZ_ENC, SELEQZ64_DESC, ISA_MIPS32R6, GPR_64;
105 def SELNEZ64 : SELNEZ_ENC, SELNEZ64_DESC, ISA_MIPS32R6, GPR_64;
DMips64InstrInfo.td544 GPR_64;
DMipsInstrInfo.td209 class GPR_64 { list<Predicate> GPRPredicates = [IsGP64bit]; }
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp3273 static const MCPhysReg GPR_64[] = { // 64-bit registers. in LowerFormalArguments_Darwin() local
3288 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerFormalArguments_Darwin()
5256 static const MCPhysReg GPR_64[] = { // 64-bit registers. in LowerCall_Darwin() local
5268 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerCall_Darwin()