| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 485 bool HasAnyUndefs; in selectVSplat() local
488 HasAnyUndefs, 8, in selectVSplat()
877 bool HasAnyUndefs; in selectNode() local
886 HasAnyUndefs, 8, in selectNode()
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| D | MipsSEISelLowering.cpp | 608 bool HasAnyUndefs; in isVSplat() local
610 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in isVSplat()
633 bool HasAnyUndefs; in isVectorAllOnes() local
637 if (BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs)) in isVectorAllOnes()
853 bool HasAnyUndefs; in performDSPShiftCombine() local
861 !BV->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in performDSPShiftCombine()
2326 bool HasAnyUndefs; in lowerBUILD_VECTOR() local
2332 HasAnyUndefs, 8, in lowerBUILD_VECTOR()
2343 if (ResTy.isInteger() && !HasAnyUndefs && SplatValue.isSignedIntN(10)) in lowerBUILD_VECTOR()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4978 bool HasAnyUndefs; in LowerBUILD_VECTOR() local
4979 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in LowerBUILD_VECTOR()
8195 bool HasAnyUndefs; in PerformANDCombine() local
8197 BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in PerformANDCombine()
8238 bool HasAnyUndefs; in PerformORCombine() local
8240 BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in PerformORCombine()
8276 bool HasAnyUndefs; in PerformORCombine() local
8283 HasAnyUndefs) && !HasAnyUndefs) { in PerformORCombine()
8285 HasAnyUndefs) && !HasAnyUndefs) { in PerformORCombine()
9376 bool HasAnyUndefs; in getVShiftImm() local
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5336 bool HasAnyUndefs; in resolveBuildVector() local
5337 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in resolveBuildVector()
6204 bool HasAnyUndefs; in getVShiftImm() local
6206 HasAnyUndefs, ElementBits) || in getVShiftImm()
7718 bool HasAnyUndefs; in tryCombineShiftImm() local
7720 HasAnyUndefs, ElemBits) || in tryCombineShiftImm()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2019 bool HasAnyUndefs; in LowerBUILD_VECTOR() local
2025 HasAnyUndefs, 0, true) && SplatBitSize <= 16)) { in LowerBUILD_VECTOR()
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 1609 unsigned &SplatBitSize, bool &HasAnyUndefs,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 702 bool HasAnyUndefs; in isConstantSplatVector() local
705 HasAnyUndefs) && in isConstantSplatVector()
2895 bool HasAnyUndefs; in visitAND() local
2897 SplatBitSize, HasAnyUndefs); in visitAND()
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| D | SelectionDAG.cpp | 6797 bool &HasAnyUndefs, in isConstantSplat() argument
6836 HasAnyUndefs = (SplatUndef != 0); in isConstantSplat()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6672 bool HasAnyUndefs; in LowerBUILD_VECTOR() local
6674 HasAnyUndefs, 0, !Subtarget.isLittleEndian()) || in LowerBUILD_VECTOR()
6687 if (Op.getValueType() != MVT::v4i32 || HasAnyUndefs) { in LowerBUILD_VECTOR()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 22189 bool HasAnyUndefs; in VectorZextCombine() local
22191 SplatBitSize, HasAnyUndefs)) in VectorZextCombine()
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