| /external/llvm/include/llvm/Target/ |
| D | TargetOpcodes.h | 27 INLINEASM = 1, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 90 case ISD::INLINEASM: break; in numberRCValPredInSU()
127 case ISD::INLINEASM: break; in numberRCValSuccInSU()
461 case ISD::INLINEASM: in SUSchedulingCost()
565 case ISD::INLINEASM: in initNumRegDefsLeft()
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| D | InstrEmitter.cpp | 932 case ISD::INLINEASM: { in EmitSpecialNode()
939 TII->get(TargetOpcode::INLINEASM)); in EmitSpecialNode()
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| D | SelectionDAGDumper.cpp | 139 case ISD::INLINEASM: return "inlineasm"; in getOperationName()
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| D | ScheduleDAGFast.cpp | 492 if (Node->getOpcode() == ISD::INLINEASM) { in DelayForLiveRegsBottomUp()
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| D | SelectionDAGISel.cpp | 1985 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N), VTs, Ops); in Select_INLINEASM()
2149 UserOpcode == ISD::INLINEASM || in WalkChainUsers()
2644 case ISD::INLINEASM: return Select_INLINEASM(NodeToMatch); in SelectCodeCommon()
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| D | ScheduleDAGRRList.cpp | 687 case ISD::INLINEASM: in EmitNode()
1279 if (Node->getOpcode() == ISD::INLINEASM) { in DelayForLiveRegsBottomUp()
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | 2009-07-16-InlineAsm-M-Operand.ll | 11 ; INLINEASM <es:fake $0>, 10, %R2, 20, -4, %R1
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 562 INLINEASM, enumerator
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| D | MachineInstr.h | 760 bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; }
762 return getOpcode() == TargetOpcode::INLINEASM && getInlineAsmDialect();
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.cpp | 59 case TargetOpcode::INLINEASM: in isResourceAvailable()
114 case TargetOpcode::INLINEASM: in reserveResources()
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| D | HexagonVLIWPacketizer.cpp | 1006 if (I->getOpcode() == Hexagon::INLINEASM) in isLegalToPacketizeTogether()
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| D | HexagonISelLowering.cpp | 708 case ISD::INLINEASM: { in LowerINLINEASM()
1781 setOperationAction(ISD::INLINEASM, MVT::Other, Custom); in HexagonTargetLowering()
2417 case ISD::INLINEASM: return LowerINLINEASM(Op, DAG); in LowerOperation()
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| D | HexagonInstrInfo.cpp | 1242 case Hexagon::INLINEASM: in isValidOffset()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 266 case TargetOpcode::INLINEASM: { // Inline Asm: Variable size. in GetInstSizeInBytes()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 308 case TargetOpcode::INLINEASM: { in GetInstSizeInBytes()
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| /external/llvm/test/CodeGen/X86/ |
| D | inline-asm-fpstack.ll | 349 ; INLINEASM <es:frndint> [sideeffect] [attdialect], $0:[regdef], %ST0<imp-def,tied5>, $1:[reguse ti…
350 ; INLINEASM <es:fldcw $0> [sideeffect] [mayload] [attdialect], $0:[mem], %EAX<undef>, 1, %noreg, 0,…
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 454 if (Opcode == ARM::INLINEASM) in rewriteT2FrameIndex()
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| D | ARMBaseInstrInfo.cpp | 610 if (MI->getOpcode() == ARM::INLINEASM) in GetInstSizeInBytes()
2109 if (Opcode == ARM::INLINEASM) in rewriteARMFrameIndex()
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| D | ARMISelDAGToDAG.cpp | 2446 case ISD::INLINEASM: { in Select()
3467 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N), in SelectInlineAsm()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 848 else if (OpC != TargetOpcode::INLINEASM) { in eliminateFrameIndex()
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| D | PPCInstrInfo.cpp | 1687 if (Opcode == PPC::INLINEASM) { in GetInstSizeInBytes()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1034 if (MI->getOpcode() == TargetOpcode::INLINEASM) { in getInstSizeInBytes()
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| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1343 case TargetOpcode::INLINEASM: { in handleSpecialFP()
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | AsmPrinter.cpp | 830 case TargetOpcode::INLINEASM: in EmitFunctionBody()
|