| /external/llvm/lib/Target/X86/ |
| D | X86Subtarget.cpp | 176 if (In64BitMode || isTargetWin32()) in IsLegalToCallImmediateAddr()
189 if (In64BitMode) { in initSubtargetFeatures()
206 if (In64BitMode) in initSubtargetFeatures()
218 assert((!In64BitMode || HasX86_64) && in initSubtargetFeatures()
226 In64BitMode) in initSubtargetFeatures()
296 In64BitMode(TargetTriple.getArch() == Triple::x86_64), in X86Subtarget()
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| D | X86InstrVMX.td | 24 Requires<[In64BitMode]>;
31 Requires<[In64BitMode]>;
47 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
49 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
55 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
57 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
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| D | X86Subtarget.h | 241 bool In64BitMode; variable
300 return In64BitMode; in is64Bit()
313 return In64BitMode && (TargetTriple.getEnvironment() == Triple::GNUX32 || in isTarget64BitILP32()
319 return In64BitMode && (TargetTriple.getEnvironment() != Triple::GNUX32 && in isTarget64BitLP64()
431 return In64BitMode && TargetTriple.isOSWindows(); in isTargetWin64()
435 return !In64BitMode && (isTargetCygMing() || isTargetKnownWindowsMSVC()); in isTargetWin32()
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| D | X86InstrSVM.td | 37 "vmrun\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
45 "vmload\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
53 "vmsave\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
61 "invlpga\t{%ecx, %rax|rax, ecx}", []>, TB, Requires<[In64BitMode]>;
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| D | X86InstrSystem.td | 54 Requires<[In64BitMode]>;
62 IIC_SYS_ENTER_EXIT>, TB, Requires<[In64BitMode]>;
68 Requires<[In64BitMode]>;
131 Requires<[In64BitMode]>;
138 Requires<[In64BitMode]>;
150 Requires<[In64BitMode]>;
157 Requires<[In64BitMode]>;
301 OpSize32, Requires<[In64BitMode]>;
304 OpSize32, Requires<[In64BitMode]>;
335 OpSize32, Requires<[In64BitMode]>;
[all …]
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| D | X86InstrControl.td | 29 Requires<[In64BitMode]>;
40 Requires<[In64BitMode]>;
47 "{l}ret{|f}q", [], IIC_RET>, Requires<[In64BitMode]>;
53 "{l}ret{|f}q\t$amt", [], IIC_RET>, Requires<[In64BitMode]>;
135 [(brind GR64:$dst)], IIC_JMP_REG>, Requires<[In64BitMode]>,
139 Requires<[In64BitMode]>, Sched<[WriteJumpLd]>;
267 Requires<[In64BitMode]>;
271 Requires<[In64BitMode]>;
275 Requires<[In64BitMode,FavorMemIndirectCall]>;
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| D | X86InstrCompiler.td | 132 Requires<[In64BitMode]>;
184 Requires<[In64BitMode]>;
193 Requires<[In64BitMode]>;
359 Requires<[In64BitMode]>;
362 Requires<[In64BitMode]>;
365 Requires<[In64BitMode]>;
368 Requires<[In64BitMode]>;
391 Requires<[In64BitMode]>;
395 Requires<[In64BitMode]>;
399 Requires<[In64BitMode]>;
[all …]
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| D | X86InstrInfo.td | 792 def In64BitMode : Predicate<"Subtarget->is64Bit()">,
982 Requires<[In64BitMode]>;
1053 IIC_POP_REG>, OpSize32, Requires<[In64BitMode]>;
1055 IIC_POP_REG>, OpSize32, Requires<[In64BitMode]>;
1057 IIC_POP_MEM>, OpSize32, Requires<[In64BitMode]>;
1061 IIC_PUSH_REG>, OpSize32, Requires<[In64BitMode]>;
1063 IIC_PUSH_REG>, OpSize32, Requires<[In64BitMode]>;
1065 IIC_PUSH_MEM>, OpSize32, Requires<[In64BitMode]>;
1072 "push{q}\t$imm", [], IIC_PUSH_IMM>, Requires<[In64BitMode]>;
1075 Requires<[In64BitMode]>;
[all …]
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| D | X86InstrExtension.td | 142 Sched<[WriteALU]>, Requires<[In64BitMode]>;
146 Sched<[WriteALULd]>, Requires<[In64BitMode]>;
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| D | X86.td | 23 def Mode64Bit : SubtargetFeature<"64bit-mode", "In64BitMode", "true",
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| D | X86InstrFPStack.td | 640 Requires<[In64BitMode]>;
645 Requires<[In64BitMode]>;
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| D | X86InstrFormats.td | 900 : I<o, F, outs, ins, asm, pattern, itin>, PS, Requires<[HasMMX,In64BitMode]>;
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| D | X86InstrArithmetic.td | 33 OpSize32, Requires<[In64BitMode]>;
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| D | X86InstrSSE.td | 4659 let Uses = [RDI], Predicates = [HasAVX,In64BitMode] in
4671 let Uses = [RDI], Predicates = [UseSSE2,In64BitMode] in
5842 def : InstAlias<"mwait\t{%rax, %rcx|rcx, rax}", (MWAITrr)>, Requires<[In64BitMode]>;
5847 Requires<[In64BitMode]>;
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| D | X86InstrAVX512.td | 2471 Requires<[HasAVX512, In64BitMode]>;
2479 Sched<[WriteStore]>, Requires<[HasAVX512, In64BitMode]>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 86 [(retflag)]>, Requires<[In64BitMode]>;
90 Requires<[In64BitMode]>;
94 Requires<[In64BitMode]>;
98 Requires<[In64BitMode]>;
101 Requires<[In64BitMode]>;
156 Requires<[In64BitMode]>;
162 Requires<[In64BitMode]>;
166 Requires<[In64BitMode]>;
169 Requires<[In64BitMode]>;
181 Requires<[In64BitMode]>;
[all …]
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| D | PPCInstrVSX.td | 978 Requires<[In64BitMode]>;
985 Requires<[In64BitMode]>;
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| D | PPCInstrInfo.td | 716 def In64BitMode : Predicate<"PPCSubTarget->isPPC64()">;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 95 // S64 - single precision in 32 64bit fp registers (In64BitMode)
97 // D64 - double precision in 32 64bit fp registers (In64BitMode)
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| /external/llvm/include/llvm/Target/ |
| D | Target.td | 976 /// def : MnemonicAlias<"pushf", "pushfq">, Requires<[In64BitMode]>;
981 /// def : MnemonicAlias<"pushf", "pushfq", "att">, Requires<[In64BitMode]>;
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| /external/llvm/docs/ |
| D | CodeGenerator.rst | 1689 def : MnemonicAlias<"pushf", "pushfq">, Requires<[In64BitMode]>;
|