Searched refs:InstInfo (Results 1 – 4 of 4) sorted by relevance
| /external/mesa3d/src/mesa/program/ |
| D | prog_instruction.c | 154 static const struct instruction_info InstInfo[MAX_OPCODE] = { variable
260 ASSERT(opcode == InstInfo[opcode].Opcode); in _mesa_num_inst_src_regs()
261 ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode); in _mesa_num_inst_src_regs()
262 return InstInfo[opcode].NumSrcRegs; in _mesa_num_inst_src_regs()
273 ASSERT(opcode == InstInfo[opcode].Opcode); in _mesa_num_inst_dst_regs()
274 ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode); in _mesa_num_inst_dst_regs()
275 return InstInfo[opcode].NumDstRegs; in _mesa_num_inst_dst_regs()
347 return InstInfo[opcode].Name; in _mesa_opcode_string()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 1197 CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator); in GetNumNodeResults() local
1199 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs; in GetNumNodeResults()
1202 for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) { in GetNumNodeResults()
1203 Record *OperandNode = InstInfo.Operands[i].Rec; in GetNumNodeResults()
1211 if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other) in GetNumNodeResults()
1778 CodeGenInstruction &InstInfo = in ApplyTypeConstraints() local
1785 unsigned NumResultsToAdd = std::min(InstInfo.Operands.NumDefs, in ApplyTypeConstraints()
1792 if (!InstInfo.ImplicitDefs.empty()) { in ApplyTypeConstraints()
1798 InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()); in ApplyTypeConstraints()
1897 if (!InstInfo.Operands.isVariadic && ChildNo != getNumChildren()) { in ApplyTypeConstraints()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 61 ParseInstructionInfo *InstInfo; member in __anon720aab8e0111::X86AsmParser
773 : MCTargetAsmParser(), STI(sti), MII(mii), InstInfo(nullptr) { in X86AsmParser()
1022 InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_SizeDirective, Start, in CreateMemForInlineAsm()
1042 InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_SizeDirective, Start, in CreateMemForInlineAsm()
1183 InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_ImmPrefix, in ParseIntelExpression()
1261 RewriteIntelBracExpression(InstInfo->AsmRewrites, SM.getSymName(), in ParseIntelBracExpression()
1348 InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Label, Loc, in ParseIntelIdentifier()
1377 InstInfo->AsmRewrites->push_back( in ParseIntelSegmentOverride()
1539 InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_DotOperator, Loc, Len, in ParseIntelDotOperator()
1564 InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_Skip, OffsetOfLoc, 7)); in ParseIntelOffsetOfOperator()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 178 struct InstInfo { struct
184 SmallVector<InstInfo, 4> Insts;
188 InstInfo Info = {I, SPAdjust, BeforeFPSet}; in addInst()
194 [&](InstInfo &Info) { return Info.I == I; }); in addExtraBytes()
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