| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsAsmBackend.h | 31 bool IsLittle; // Big or little endian variable
35 MipsAsmBackend(const Target &T, Triple::OSType OSType, bool IsLittle, in MipsAsmBackend() argument
37 : MCAsmBackend(), OSType(OSType), IsLittle(IsLittle), Is64Bit(Is64Bit) {} in MipsAsmBackend()
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| D | MipsAsmBackend.cpp | 161 MCELFObjectTargetWriter::getOSABI(OSType), IsLittle, Is64Bit); in createObjectWriter()
222 unsigned Idx = IsLittle ? (microMipsLEByteOrder ? calculateMMLEIndex(i) in applyFixup()
234 unsigned Idx = IsLittle ? (microMipsLEByteOrder ? calculateMMLEIndex(i) in applyFixup()
379 if (IsLittle) in getFixupKindInfo()
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| D | MipsMCCodeEmitter.h | 43 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle) in MipsMCCodeEmitter() argument
44 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {} in MipsMCCodeEmitter()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackendELF.h | 18 ARMAsmBackendELF(const Target &T, StringRef TT, uint8_t OSABI, bool IsLittle) in ARMAsmBackendELF() argument
19 : ARMAsmBackend(T, TT, IsLittle), OSABI(OSABI) {} in ARMAsmBackendELF()
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| D | ARMAsmBackend.h | 26 ARMAsmBackend(const Target &T, StringRef TT, bool IsLittle) in ARMAsmBackend() argument
28 isThumbMode(TT.startswith("thumb")), IsLittleEndian(IsLittle) {} in ARMAsmBackend()
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| D | ARMMCCodeEmitter.cpp | 47 ARMMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx, bool IsLittle) in ARMMCCodeEmitter() argument
48 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { in ARMMCCodeEmitter()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64Subtarget.h | 53 bool IsLittle; variable
108 bool isLittleEndian() const { return IsLittle; } in isLittleEndian()
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| D | AArch64Subtarget.cpp | 53 IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(), in AArch64Subtarget()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 111 const ARMBaseTargetMachine &TM, bool IsLittle) in ARMSubtarget() argument
113 ARMProcClass(None), stackAlignment(4), CPUString(CPU), IsLittle(IsLittle), in ARMSubtarget()
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| D | ARMSubtarget.h | 220 bool IsLittle; variable
241 const std::string &FS, const ARMBaseTargetMachine &TM, bool IsLittle);
423 bool isLittle() const { return IsLittle; } in isLittle()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.h | 49 bool IsLittle; variable
204 bool isLittle() const { return IsLittle; } in isLittle()
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| D | MipsSubtarget.cpp | 66 IsLittle(little), IsSingleFloat(false), IsFPXX(false), NoABICalls(false), in MipsSubtarget()
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| D | MipsISelLowering.cpp | 2149 bool IsLittle = Subtarget.isLittle(); in lowerLOAD() local
2163 IsLittle ? 7 : 0); in lowerLOAD()
2165 IsLittle ? 0 : 7); in lowerLOAD()
2169 IsLittle ? 3 : 0); in lowerLOAD()
2171 IsLittle ? 0 : 3); in lowerLOAD()
2219 bool IsLittle) { in lowerUnalignedIntStore() argument
2231 IsLittle ? 3 : 0); in lowerUnalignedIntStore()
2232 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); in lowerUnalignedIntStore()
2242 SDValue SDL = createStoreLR(MipsISD::SDL, DAG, SD, Chain, IsLittle ? 7 : 0); in lowerUnalignedIntStore()
2243 return createStoreLR(MipsISD::SDR, DAG, SD, SDL, IsLittle ? 0 : 7); in lowerUnalignedIntStore()
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