Searched refs:IsSP (Results 1 – 9 of 9) sorted by relevance
154 inline bool CPURegister::IsSP() const { in IsSP() function346 DCHECK(!reg.IsSP());358 DCHECK(!reg.IsSP());474 DCHECK(!regoffset.IsSP());489 DCHECK(regoffset.Is64Bits() && !regoffset.IsSP());513 DCHECK(regoffset_.Is64Bits() && !regoffset_.IsSP());527 DCHECK(!regoffset_.IsSP());
1730 if (rd.IsSP() || rm.IsSP()) { in mov()2173 if (rn.IsSP() || rd.IsSP()) { in AddSub()2174 DCHECK(!(rd.IsSP() && (S == SetFlags))); in AddSub()
206 Register temp = rd.IsSP() ? temps.AcquireSameSizeAs(rd) : rd; in Mov()232 if (rd.IsSP()) { in Mov()249 Register dst = (rd.IsSP()) ? temps.AcquireSameSizeAs(rd) : rd; in Mov()290 DCHECK(rd.IsSP()); in Mov()419 if (IsImmMovz(imm, reg_size) && !dst.IsSP()) { in TryOneInstrMoveImmediate()424 } else if (IsImmMovn(imm, reg_size) && !dst.IsSP()) { in TryOneInstrMoveImmediate()
444 DCHECK(!rd.IsSP() && rd.Is64Bits()); in CzeroX()456 DCHECK(!rd.IsSP()); in CmovX()
72 bool IsSP() const;
328 VIXL_ASSERT(!reg.IsSP()); in Operand()339 VIXL_ASSERT(!reg.IsSP()); in Operand()391 VIXL_ASSERT(!regoffset.IsSP()); in MemOperand()406 VIXL_ASSERT(regoffset.Is64Bits() && !regoffset.IsSP()); in MemOperand()428 VIXL_ASSERT(regoffset_.Is64Bits() && !regoffset_.IsSP()); in MemOperand()442 VIXL_ASSERT(!regoffset_.IsSP()); in MemOperand()2497 if (rd.IsSP() || rm.IsSP()) { in mov()4595 if (rn.IsSP() || rd.IsSP()) { in AddSub()4596 VIXL_ASSERT(!(rd.IsSP() && (S == SetFlags))); in AddSub()
396 temp = rd.IsSP() ? temps.AcquireSameSizeAs(rd) : rd; in MoveImmediateHelper()427 if (rd.IsSP()) { in MoveImmediateHelper()443 if (IsImmMovz(imm, reg_size) && !dst.IsSP()) { in OneInstrMoveImmediateHelper()450 } else if (IsImmMovn(imm, reg_size) && !dst.IsSP()) { in OneInstrMoveImmediateHelper()
179 bool IsSP() const { in IsSP() function
META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF ...