Searched refs:LO16 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 663 MachineInstrBuilder LO16, HI16; in ExpandMOV32BitImm() local
671 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg); in ExpandMOV32BitImm()
680 LO16 = LO16.addImm(SOImmValV1); in ExpandMOV32BitImm()
682 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
684 LO16.addImm(Pred).addReg(PredReg).addReg(0); in ExpandMOV32BitImm()
686 TransferImpOps(MI, LO16, HI16); in ExpandMOV32BitImm()
701 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg); in ExpandMOV32BitImm()
711 LO16 = LO16.addImm(Lo16); in ExpandMOV32BitImm()
718 LO16 = LO16.addExternalSymbol(ES, TF | ARMII::MO_LO16); in ExpandMOV32BitImm()
725 LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_LO16); in ExpandMOV32BitImm()
[all …]
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| /external/llvm/test/MC/Mips/ |
| D | sort-relocation-table.s | 5 # corresponding *LO16 relocation against the same symbol.
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 239 def LO16 : SDNodeXForm<imm, [{
290 }], LO16>;
2533 (ORI (LIS (HI16 imm:$imm)), (LO16 imm:$imm))>;
2543 (ADDIS (ADDI $in, (LO16 imm:$imm)), (HA16 imm:$imm))>;
2546 (ORIS (ORI $in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
2549 (XORIS (XORI $in, (LO16 imm:$imm)), (HI16 imm:$imm))>;
2984 (LO16 imm:$imm)), sub_eq)>;
3001 (LO16 imm:$imm)), sub_eq)>;
3052 (LO16 imm:$imm)), sub_eq)>;
3069 (LO16 imm:$imm)), sub_eq)>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 513 def LO16 : SDNodeXForm<imm, [{
541 // The LO16 param means that only the lower 16 bits of the node
549 }], LO16>;
1691 (ORi (LUi (HI16 imm:$imm)), (LO16 imm:$imm))>;
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| /external/llvm/docs/ |
| D | CodeGenerator.rst | 1049 (ORI (LIS (HI16 imm:$imm)), (LO16 imm:$imm))>;
1055 instruction". To make this work, the ``LO16``/``HI16`` node transformations
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