| /external/v8/src/arm64/ |
| D | regexp-macro-assembler-arm64.cc | 298 __ Lsr(x11, GetCachedRegister(start_reg), kWRegSizeInBits); in CheckNotBackReferenceIgnoreCase() local
427 __ Lsr(x11, GetCachedRegister(start_reg), kWRegSizeInBits); in CheckNotBackReference() local
837 __ Lsr(capture_end.X(), capture_start.X(), kWRegSizeInBits); in GetCode() local
1152 __ Lsr(current_input_offset().X(), cached_register, kWRegSizeInBits); in ReadCurrentPositionFromRegister() local
1554 __ Lsr(maybe_result.X(), GetCachedRegister(register_index), in GetRegister() local
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| D | debug-arm64.cc | 166 __ Lsr(scratch, reg, 32); in Generate_DebugBreakCallHelper() local
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| D | macro-assembler-arm64-inl.h | 906 void MacroAssembler::Lsr(const Register& rd, in Lsr() function
915 void MacroAssembler::Lsr(const Register& rd, in Lsr() function
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| D | macro-assembler-arm64.h | 442 inline void Lsr(const Register& rd, const Register& rn, unsigned shift);
443 inline void Lsr(const Register& rd, const Register& rn, const Register& rm);
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| D | lithium-codegen-arm64.cc | 1596 __ Lsr(filler_count.W(), ToRegister32(instr->size()), kPointerSizeLog2); in DoAllocate() local
2344 __ Lsr(result_reg, result_reg, 32); in DoDoubleBits() local
4904 __ Lsr(result, left, right); in DoShiftI() local
4926 case Token::SHR: __ Lsr(result, left, shift_count); break; in DoShiftI() local
4966 __ Lsr(result, left, result); in DoShiftS() local
4999 __ Lsr(result, left, shift_count); in DoShiftS() local
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| D | macro-assembler-arm64.cc | 1552 Lsr(scratch2, state, StackHandler::kKindWidth); in JumpToHandlerEntry()
4597 Lsr(bitmap_scratch, bitmap_scratch, shift_scratch); in HasColor()
4709 Lsr(load_scratch, load_scratch, shift_scratch); in EnsureNotWhite()
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| D | code-stubs-arm64.cc | 909 __ Lsr(exponent_abs, exponent_abs, 1); in Generate() local
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| D | full-codegen-arm64.cc | 2064 __ Lsr(x10, left, right); in EmitInlineSmiBinaryOp() local
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| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 283 ASSEMBLE_SHIFT(Lsr, 64); in AssembleArchInstruction()
286 ASSEMBLE_SHIFT(Lsr, 32); in AssembleArchInstruction()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineInternal.h | 522 Value *SimplifyShrShlDemandedBits(Instruction *Lsr, Instruction *Sftl,
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| /external/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 4779 __ Lsr(x16, x0, x1); in TEST() local
4780 __ Lsr(x17, x0, x2); in TEST() local
4781 __ Lsr(x18, x0, x3); in TEST() local
4782 __ Lsr(x19, x0, x4); in TEST() local
4783 __ Lsr(x20, x0, x5); in TEST() local
4784 __ Lsr(x21, x0, x6); in TEST() local
4786 __ Lsr(w22, w0, w1); in TEST() local
4787 __ Lsr(w23, w0, w2); in TEST() local
4788 __ Lsr(w24, w0, w3); in TEST() local
4789 __ Lsr(w25, w0, w4); in TEST() local
[all …]
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1548 void Lsr(const Register& rd, const Register& rn, unsigned shift) { in Lsr() function
1555 void Lsr(const Register& rd, const Register& rn, const Register& rm) { in Lsr() function
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| /external/vixl/test/ |
| D | test-assembler-a64.cc | 8558 __ Lsr(x16, x0, x1); in TEST() local
8559 __ Lsr(x17, x0, x2); in TEST() local
8560 __ Lsr(x18, x0, x3); in TEST() local
8561 __ Lsr(x19, x0, x4); in TEST() local
8562 __ Lsr(x20, x0, x5); in TEST() local
8563 __ Lsr(x21, x0, x6); in TEST() local
8565 __ Lsr(w22, w0, w1); in TEST() local
8566 __ Lsr(w23, w0, w2); in TEST() local
8567 __ Lsr(w24, w0, w3); in TEST() local
8568 __ Lsr(w25, w0, w4); in TEST() local
[all …]
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