| /external/valgrind/none/tests/mips64/ |
| D | arithmetic_instruction.c | 13 MOVZ, SEB, SEH, SLT, enumerator
267 case MOVZ: in main()
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| D | move_instructions.stdout.exp-BE | 1129 --- MOVZ.S ---
1146 --- MOVZ.D ---
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| D | move_instructions.stdout.exp-LE | 1129 --- MOVZ.S ---
1146 --- MOVZ.D ---
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| /external/v8/src/mips/ |
| D | constants-mips.cc | 252 case MOVZ: in InstructionType()
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| D | constants-mips.h | 382 MOVZ = ((1 << 3) + 2), enumerator
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| D | disasm-mips.cc | 792 case MOVZ: in DecodeTypeRegister()
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| D | simulator-mips.cc | 2074 case MOVZ: in ConfigureTypeRegister()
2634 case MOVZ: in DecodeTypeRegister()
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| D | assembler-mips.cc | 1898 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVZ); in movz()
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| /external/v8/src/mips64/ |
| D | constants-mips64.cc | 269 case MOVZ: in InstructionType()
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| D | constants-mips64.h | 359 MOVZ = ((1 << 3) + 2), enumerator
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| D | disasm-mips64.cc | 919 case MOVZ: in DecodeTypeRegister()
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| D | simulator-mips64.cc | 2197 case MOVZ: in ConfigureTypeRegister()
2755 case MOVZ: in DecodeTypeRegister()
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| D | assembler-mips64.cc | 2093 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVZ); in movz()
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_64.c | 101 #define MOVZ 0xd2800000 macro
139 FAIL_IF(push_inst(compiler, MOVZ | RD(dst) | ((imm & 0xffff) << 5))); in emit_imm64_const()
148 SLJIT_ASSERT((inst[0] & 0xffe00000) == MOVZ && (inst[1] & 0xffe00000) == (MOVK | (1 << 21))); in modify_imm64_const()
149 inst[0] = MOVZ | dst | ((new_imm & 0xffff) << 5); in modify_imm64_const()
301 buf_ptr[0] = MOVZ | dst | ((addr & 0xffff) << 5); in sljit_generate_code()
421 return push_inst(compiler, MOVZ | RD(dst) | (imm << 5)); in load_immediate()
442 FAIL_IF(push_inst(compiler, MOVZ | RD(dst) | ((imm & 0xffff) << 5))); in load_immediate()
491 FAIL_IF(push_inst(compiler, MOVZ | RD(dst) | ((simm & 0xffff) << 5) | (i << 21))); in load_immediate()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64Schedule.td | 21 def WriteImm : SchedWrite; // MOVN, MOVZ
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| D | AArch64SchedCyclone.td | 108 // MOVZ Rd, #0
128 // MOVN,MOVZ,MOVK
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| D | AArch64InstrInfo.td | 408 defm MOVZ : MoveImmediate<0b10, "movz">;
461 defm : movw_mov_alias<"MOVZ", MOVZWi, GPR32, 32, 0>;
462 defm : movw_mov_alias<"MOVZ", MOVZWi, GPR32, 32, 16>;
464 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 0>;
465 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 16>;
466 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 32>;
467 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 48>;
525 // Deal with the various forms of (ELF) large addressing with MOVZ/MOVK
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| /external/v8/src/arm64/ |
| D | constants-arm64.h | 562 MOVZ = 0x40000000, enumerator
566 MOVZ_w = MoveWideImmediateFixed | MOVZ,
567 MOVZ_x = MoveWideImmediateFixed | MOVZ | SixtyFourBits,
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| D | assembler-arm64.h | 1528 MoveWide(rd, imm, shift, MOVZ);
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-movi.ll | 43 ; Tests for MOVZ with MOVK.
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| /external/vixl/src/vixl/a64/ |
| D | constants-a64.h | 586 MOVZ = 0x40000000, enumerator
590 MOVZ_w = MoveWideImmediateFixed | MOVZ,
591 MOVZ_x = MoveWideImmediateFixed | MOVZ | SixtyFourBits,
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| D | assembler-a64.h | 1869 MoveWide(rd, imm, shift, MOVZ);
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| /external/valgrind/none/tests/mips32/ |
| D | MoveIns.stdout.exp-BE | 305 MOVZ.S
323 MOVZ.D
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| D | MIPS32int.stdout.exp-mips32-BE | 359 MOVZ
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| /external/vixl/doc/ |
| D | supported-instructions.md | 812 ### MOVZ ### subsection
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