| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 494 ISD::MemIndexedMode &AM, bool &IsInc,
497 ISD::MemIndexedMode &AM,
500 SDValue &Offset, ISD::MemIndexedMode &AM,
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| D | AArch64ISelLowering.cpp | 8806 ISD::MemIndexedMode &AM, in getIndexedAddressParts()
8828 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
8850 ISD::MemIndexedMode &AM, SelectionDAG &DAG) const { in getPostIndexedAddressParts()
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| D | AArch64ISelDAGToDAG.cpp | 971 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectIndexedLoad()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 736 enum MemIndexedMode { enum
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| D | SelectionDAGNodes.h | 646 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
1830 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
1846 ISD::MemIndexedMode getAddressingMode() const {
1847 return ISD::MemIndexedMode((SubclassData >> 2) & 7);
1866 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1894 SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
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| D | SelectionDAG.h | 823 SDValue Offset, ISD::MemIndexedMode AM);
824 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
831 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
851 SDValue Offset, ISD::MemIndexedMode AM);
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 171 ISD::MemIndexedMode &AM,
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| D | MSP430ISelDAGToDAG.cpp | 300 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
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| D | MSP430ISelLowering.cpp | 1111 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 307 ISD::MemIndexedMode &AM,
314 SDValue &Offset, ISD::MemIndexedMode &AM,
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| D | ARMISelDAGToDAG.cpp | 802 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
838 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
858 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
931 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1022 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1346 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1444 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectARMIndexedLoad()
1517 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectT2IndexedLoad()
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| D | ARMISelLowering.cpp | 10305 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
10344 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 203 ISD::MemIndexedMode &AM,
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| D | HexagonISelDAGToDAG.cpp | 459 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
550 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
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| D | HexagonISelLowering.cpp | 669 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 807 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
817 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
843 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
849 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
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| D | TargetLowering.h | 1985 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
1996 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 336 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
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| D | SelectionDAG.cpp | 588 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, in encodeMemSDNodeFlags()
4748 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
4781 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
4873 SDValue Offset, ISD::MemIndexedMode AM) { in getIndexedLoad()
5008 SDValue Offset, ISD::MemIndexedMode AM) { in getIndexedStore()
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| D | DAGCombiner.cpp | 8634 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore()
8859 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
8940 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SplitIndexingFromLoad()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 429 ISD::MemIndexedMode &AM,
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| D | PPCISelLowering.cpp | 1679 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
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