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/external/llvm/test/CodeGen/Thumb2/
Daligned-spill.ll2 ; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills=1 | FileCheck %s --check-prefix=NEON
23 ; NEON: f
24 ; NEON: push {r4, r7, lr}
25 ; NEON: sub.w r4, sp, #64
26 ; NEON: bfc r4, #0, #4
28 ; NEON: mov sp, r4
29 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
30 ; NEON: vst1.64 {d12, d13, d14, d15}, [r4:128]
36 ; NEON: sub sp, #16
38 ; NEON: add r[[R4:[0-9]+]], sp, #16
[all …]
Dfloat-intrinsics-double.ll5 …ck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=VFP4
6 … %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=FP-AR…
127 ; NEON: vmov.i32 [[REG:d[0-9]+]], #0x80000000
128 ; NEON: vshl.i64 [[REG]], [[REG]], #32
129 ; NEON: vbsl [[REG]], d
/external/clang/lib/CodeGen/
DCGBuiltin.cpp2057 { NEON::BI__builtin_neon_ ## NameBase, 0, 0, #NameBase, 0 }
2060 { NEON:: BI__builtin_neon_ ## NameBase, \
2064 { NEON:: BI__builtin_neon_ ## NameBase, \
2676 case NEON::BI__builtin_neon_vcled_s64: in EmitCommonNeonSISDBuiltinExpr()
2677 case NEON::BI__builtin_neon_vcled_u64: in EmitCommonNeonSISDBuiltinExpr()
2678 case NEON::BI__builtin_neon_vcles_f32: in EmitCommonNeonSISDBuiltinExpr()
2679 case NEON::BI__builtin_neon_vcled_f64: in EmitCommonNeonSISDBuiltinExpr()
2680 case NEON::BI__builtin_neon_vcltd_s64: in EmitCommonNeonSISDBuiltinExpr()
2681 case NEON::BI__builtin_neon_vcltd_u64: in EmitCommonNeonSISDBuiltinExpr()
2682 case NEON::BI__builtin_neon_vclts_f32: in EmitCommonNeonSISDBuiltinExpr()
[all …]
/external/llvm/test/MC/ARM/
Dneon-mov-vfp.s3 …known -show-encoding -mattr=+neon < %s 2>&1 | FileCheck %s --check-prefix=NEON --check-prefix=CHECK
4 …known -show-encoding -mattr=+neon < %s 2>&1 | FileCheck %s --check-prefix=NEON --check-prefix=CHECK
6 @ The 32-bit variants of the NEON scalar move instructions are also available
14 @ VFP-DAG: error: instruction requires: NEON
15 @ VFP-DAG: error: instruction requires: NEON
16 @ NEON-DAG: vmov.8 d22[5], r2 @ encoding:
17 @ NEON-DAG: vmov.16 d3[2], r4 @ encoding:
26 @ VFP-DAG: error: instruction requires: NEON
27 @ VFP-DAG: error: instruction requires: NEON
28 @ NEON-DAG: vmov.s8 r2, d22[5] @ encoding:
[all …]
Ddiagnostics-noneon.s6 @ CHECK-ERRORS: error: instruction requires: NEON
7 @ CHECK-ERRORS: error: instruction requires: NEON
Dinvalid-fp-armv8.s80 @ V8: error: instruction requires: NEON
85 @ V8: error: instruction requires: NEON
87 @ V8: error: instruction requires: NEON
/external/llvm/test/CodeGen/ARM/
Dfp_convert.ll11 ; RUN: | FileCheck %s -check-prefix=NEON
14 ; RUN: | FileCheck %s -check-prefix=NEON
22 ; NEON-LABEL: test1:
23 ; NEON: vadd.f32 [[D0:d[0-9]+]]
24 ; NEON: vcvt.s32.f32 d0, [[D0]]
34 ; NEON-LABEL: test2:
35 ; NEON: vadd.f32 [[D0:d[0-9]+]]
36 ; NEON: vcvt.u32.f32 d0, [[D0]]
46 ; NEON-LABEL: test3:
47 ; NEON: vcvt.f32.u32 d
[all …]
Dfnmscs.ll5 ; RUN: | FileCheck %s -check-prefix=NEON
24 ; NEON-LABEL: t1:
25 ; NEON: vnmla.f32
45 ; NEON-LABEL: t2:
46 ; NEON: vnmla.f32
66 ; NEON-LABEL: t3:
67 ; NEON: vnmla.f64
87 ; NEON-LABEL: t4:
88 ; NEON: vnmla.f64
Dfnmacs.ll2 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s -check-prefix=NEON
10 ; NEON-LABEL: t1:
11 ; NEON: vmls.f32
26 ; NEON-LABEL: t2:
27 ; NEON: vmls.f64
Dfmscs.ll2 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s -check-prefix=NEON
10 ; NEON-LABEL: t1:
11 ; NEON: vnmls.f32
26 ; NEON-LABEL: t2:
27 ; NEON: vnmls.f64
Dfmacs.ll2 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s -check-prefix=NEON
12 ; NEON-LABEL: t1:
13 ; NEON: vmla.f32
28 ; NEON-LABEL: t2:
29 ; NEON: vmla.f64
44 ; NEON-LABEL: t3:
45 ; NEON: vmla.f32
Dselect.ll7 ; RUN: | FileCheck %s --check-prefix=CHECK-NEON
82 ; CHECK-NEON-LABEL: f8:
83 ; CHECK-NEON: movw [[R3:r[0-9]+]], #1123
84 ; CHECK-NEON: adr [[R2:r[0-9]+]], LCPI7_0
85 ; CHECK-NEON-NEXT: cmp r0, [[R3]]
86 ; CHECK-NEON-NEXT: it eq
87 ; CHECK-NEON-NEXT: addeq{{.*}} [[R2]], #4
88 ; CHECK-NEON-NEXT: ldr
89 ; CHECK-NEON: bx
Dvector-extend-narrow.ll23 ; Note: vld1 here is reasonably important. Mixing VFP and NEON
52 ; Note: vld1 here is reasonably important. Mixing VFP and NEON
Ddomain-conv-vmovs.ll55 ; Do an operation (which will end up NEON because of +neonfp) to convince the
56 ; execution-domain pass that NEON is a good thing to use.
90 ; Check that the movement to and from GPRs takes place in the NEON domain.
/external/clang/include/clang/Basic/
DTargetBuiltins.h24 namespace NEON {
37 LastNEONBuiltin = NEON::FirstTSBuiltin - 1,
48 LastNEONBuiltin = NEON::FirstTSBuiltin - 1,
DBuiltinsNEON.def1 //===--- BuiltinsNEON.def - NEON Builtin function database ------*- C++ -*-===//
10 // This file defines the NEON-specific builtin function database. Users of
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td97 // Some single precision VFP instructions may be executed on both NEON and VFP
111 // Some single precision VFP instructions may be executed on both NEON and VFP
159 // Some single precision VFP instructions may be executed on both NEON and
172 // Some single precision VFP instructions may be executed on both NEON and
185 // Some single precision VFP instructions may be executed on both NEON and
294 // Some single precision VFP instructions may be executed on both NEON and
310 // Some single precision VFP instructions may be executed on both NEON and
338 // Some single precision VFP instructions may be executed on both NEON and
352 // Some single precision VFP instructions may be executed on both NEON and
417 // Some single precision VFP instructions may be executed on both NEON and
[all …]
/external/boringssl/linux-arm/crypto/sha/
Dsha512-armv4.S29 @ Add NEON implementation. On Cortex A8 it was measured to process
34 @ Improve NEON performance by 12% on Snapdragon S4. In absolute
/external/libpng/contrib/arm-neon/
DREADME1 OPERATING SYSTEM SPECIFIC ARM NEON DETECTION
4 Detection of the ability to exexcute ARM NEON on an ARM processor requires
15 For any of this code to be used the ARM NEON code must be enabled and run time
51 That function must return 1 if ARM NEON instructions are supported, 0 if not.
/external/libopus/
Dconfigure.ac227 [Use ARM NEON inline asm optimizations])
228 inline_optimization="$inline_optimization (NEON)"
273 [Trying to force-enable NEON instructions...])
304 [Define if compiler supports NEON instructions])
307 [Define if binary requires NEON instruction support])
308 asm_optimization="$asm_optimization (NEON)"
310 [rtcd_support="$rtcd_support (NEON)"]
Dconfig.h.in85 /* Use ARM NEON inline asm optimizations */
94 /* Define if compiler supports NEON instructions */
103 /* Define if binary requires NEON instruction support */
/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-armv7.txt338 # Undefined encodings for NEON umaal
354 # Undefined encodings for NEON vcvt (float <-> fixed)
368 # Undefined encodings for NEON vext
378 # Undefined encodings for NEON vldmsdb
388 # Undefined encodings for NEON vmov
403 # Undefined encodings for NEON vqadd
419 # Undefined encodings for NEON vld/vst
/external/libopus/m4/
Das-gcc-inline-assembly.m436 AC_MSG_CHECKING([if assembler supports NEON instructions on ARM])
47 AC_MSG_CHECKING([if assembler supports NEON instructions on ARM])
/external/eigen/Eigen/src/Core/arch/
DCMakeLists.txt3 ADD_SUBDIRECTORY(NEON)
/external/eigen/Eigen/src/Core/arch/NEON/
DCMakeLists.txt5 DESTINATION ${INCLUDE_INSTALL_DIR}/Eigen/src/Core/arch/NEON COMPONENT Devel

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