Home
last modified time | relevance | path

Searched refs:NumMicroOps (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64SchedA57WriteRes.td59 let NumMicroOps = 2;
65 let NumMicroOps = 2;
70 let NumMicroOps = 2;
75 let NumMicroOps = 2;
79 let NumMicroOps = 2;
83 let NumMicroOps = 2;
87 let NumMicroOps = 2;
91 let NumMicroOps = 2;
95 let NumMicroOps = 2;
100 let NumMicroOps = 2;
[all …]
DAArch64SchedCyclone.td176 let NumMicroOps = 2;
/external/llvm/lib/Target/X86/
DX86SchedHaswell.td279 let NumMicroOps = 2;
285 let NumMicroOps = 3;
292 let NumMicroOps = 2;
295 let NumMicroOps = 3;
301 let NumMicroOps = 2;
307 let NumMicroOps = 2;
313 let NumMicroOps = 3;
318 let NumMicroOps = 2;
322 let NumMicroOps = 3;
336 let NumMicroOps = 5;
[all …]
/external/llvm/include/llvm/MC/
DMCSchedule.h108 unsigned short NumMicroOps; member
119 return NumMicroOps != InvalidNumMicroOps; in isValid()
122 return NumMicroOps == VariantNumMicroOps; in isVariant()
DMCInstrItineraries.h98 int NumMicroOps; ///< # of micro-ops, -1 means it's variable member
234 return Itineraries[ItinClassIndx].NumMicroOps; in getNumMicroOps()
/external/llvm/lib/Target/ARM/
DARMScheduleSwift.td1121 let NumMicroOps = 2;
1125 let NumMicroOps = 3;
1296 let NumMicroOps = 3;
1301 let NumMicroOps = 0;
1305 let NumMicroOps = 0;
1309 let NumMicroOps = 0;
1318 let NumMicroOps = 5;
1335 let NumMicroOps = 1;
1348 let NumMicroOps = 2;
1352 let NumMicroOps = 2;
[all …]
DARMScheduleA9.td1925 // other writes associated with the operand have NumMicroOps = 0.
1943 let NumMicroOps = 0; }
1946 let NumMicroOps = 0; }
1991 def A9WriteAdr : SchedWriteRes<[A9UnitAGU]> { let NumMicroOps = 0; }
1997 let NumMicroOps = 0; }
2014 def A9WriteCycle1 : SchedWriteRes<[]> { let Latency = 1; let NumMicroOps = 0; }
2054 let NumMicroOps = 0; }
2058 let NumMicroOps = 0; }
2116 let NumMicroOps = 0;
2528 def : WriteRes<WriteNoop, []> { let Latency = 0; let NumMicroOps = 0; }
DARMSchedule.td50 // NumMicroOps = 2; // Dispatch 2 micro-ops.
/external/llvm/utils/TableGen/
DSubtargetEmitter.cpp583 Intinerary.NumMicroOps << ", " << in EmitItineraries()
832 SCDesc.NumMicroOps = 0; in GenSchedClassTables()
856 SCDesc.NumMicroOps = MCSchedClassDesc::VariantNumMicroOps; in GenSchedClassTables()
939 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
943 SCDesc.NumMicroOps += WriteRes->getValueAsInt("NumMicroOps"); in GenSchedClassTables()
989 SCDesc.NumMicroOps = MCSchedClassDesc::InvalidNumMicroOps; in GenSchedClassTables()
1011 if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) { in GenSchedClassTables()
1154 OS << MCDesc.NumMicroOps in EmitSchedClassTables()
/external/llvm/include/llvm/Target/
DTargetItinerary.td86 // NumMicroOps represents the number of micro-operations that each instruction
114 int NumMicroOps = uops;
DTargetSchedule.td144 // and moving them into a reservation station.) Normally NumMicroOps
237 int NumMicroOps = 1;
273 // should either override the write's NumMicroOps to be greater than 1
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp86 return SC->NumMicroOps; in getNumMicroOps()
DTargetInstrInfo.cpp759 int UOps = ItinData->Itineraries[Class].NumMicroOps; in getNumMicroOps()