| /external/llvm/test/CodeGen/AArch64/ |
| D | fp16-v4-instructions.ll | 7 ; CHECK-DAG: fcvtl [[OP2:v[0-9]+\.4s]], v1.4h
8 ; CHECK: fadd [[RES:v[0-9]+.4s]], [[OP1]], [[OP2]]
28 ; CHECK-DAG: fcvtl [[OP2:v[0-9]+\.4s]], v1.4h
29 ; CHECK: fsub [[RES:v[0-9]+.4s]], [[OP1]], [[OP2]]
40 ; CHECK-DAG: fcvtl [[OP2:v[0-9]+\.4s]], v1.4h
41 ; CHECK: fmul [[RES:v[0-9]+.4s]], [[OP1]], [[OP2]]
52 ; CHECK-DAG: fcvtl [[OP2:v[0-9]+\.4s]], v1.4h
53 ; CHECK: fdiv [[RES:v[0-9]+.4s]], [[OP1]], [[OP2]]
137 ; CHECK-NEXT: sshr [[OP2:v[0-9]+\.4h]], [[OP1]], #8
138 ; CHECK-NEXT: sshll [[OP3:v[0-9]+\.4s]], [[OP2]], #0
[all …]
|
| D | fp16-v8-instructions.ll | 289 ; CHECK-DAG: scvtf [[OP2:v[0-9]+\.4s]], v1.4s
290 ; CHECK-DAG: fcvtn v[[REG:[0-9]+]].4h, [[OP2]]
301 ; CHECK-DAG: scvtf [[OP2:v[0-9]+\.2d]], v1.2d
303 ; CHECK-DAG: fcvtn2 [[OP3]].4s, [[OP2]]
341 ; CHECK-DAG: ucvtf [[OP2:v[0-9]+\.4s]], v1.4s
342 ; CHECK-DAG: fcvtn v[[REG:[0-9]+]].4h, [[OP2]]
353 ; CHECK-DAG: ucvtf [[OP2:v[0-9]+\.2d]], v1.2d
355 ; CHECK-DAG: fcvtn2 [[OP3]].4s, [[OP2]]
|
| /external/pcre/dist/ |
| D | pcre_jit_compile.c | 525 #define OP2(op, dst, dstw, src1, src1w, src2, src2w) \ macro
2091 OP2(SLJIT_SUB | SLJIT_SET_E, COUNT_MATCH, 0, COUNT_MATCH, 0, SLJIT_IMM, 1); in count_match()
2100 OP2(SLJIT_ADD, STACK_TOP, 0, STACK_TOP, 0, SLJIT_IMM, size * sizeof(sljit_sw)); in allocate_stack()
2114 OP2(SLJIT_SUB, STACK_TOP, 0, STACK_TOP, 0, SLJIT_IMM, size * sizeof(sljit_sw)); in free_stack()
2126 OP2(SLJIT_SUB, SLJIT_R0, 0, SLJIT_MEM1(SLJIT_S0), SLJIT_OFFSETOF(jit_arguments, begin), SLJIT_IMM, … in reset_ovector()
2138 OP2(SLJIT_SUB | SLJIT_SET_E, SLJIT_R2, 0, SLJIT_R2, 0, SLJIT_IMM, 1); in reset_ovector()
2164 OP2(SLJIT_SUB | SLJIT_SET_E, STACK_TOP, 0, STACK_TOP, 0, SLJIT_IMM, 1); in do_reset_match()
2217 OP2(SLJIT_SUB, SLJIT_R2, 0, SLJIT_MEM1(SLJIT_R0), SLJIT_OFFSETOF(jit_arguments, offsets), SLJIT_IMM… in copy_ovector()
2223 OP2(SLJIT_SUB, SLJIT_S1, 0, SLJIT_MEM1(SLJIT_S0), 0, SLJIT_R0, 0); in copy_ovector()
2224 OP2(SLJIT_ADD, SLJIT_S0, 0, SLJIT_S0, 0, SLJIT_IMM, sizeof(sljit_sw)); in copy_ovector()
[all …]
|
| /external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| D | sm4_to_tgsi.cpp | 240 #define OP2(n) OP2_(n, n) macro
261 OP2(ADD); in translate_insns()
262 OP2(MUL); in translate_insns()
264 OP2(DIV); in translate_insns()
267 OP2(MIN); in translate_insns()
268 OP2(MAX); in translate_insns()
276 OP2(AND); in translate_insns()
277 OP2(OR); in translate_insns()
278 OP2(XOR); in translate_insns()
281 OP2(DP2); in translate_insns()
[all …]
|
| /external/llvm/lib/Target/R600/ |
| D | R600Defines.h | 42 OP2 = (1 << 11), enumerator
|
| D | R600InstrInfo.cpp | 141 (TargetFlags & R600_InstFlag::OP2) | in hasInstrModifiers()
|
| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| D | kvm.h | 147 ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
|
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| D | R600MCCodeEmitter.cpp | 137 Desc.TSFlags & R600_InstFlag::OP2)) { in EncodeInstruction()
|
| /external/boringssl/src/decrepit/cast/ |
| D | cast.c | 98 #define E_CAST(n, key, L, R, OP1, OP2, OP3) \ argument
107 L ^= (((((a OP2 b)&0xffffffffL)OP3 c) & 0xffffffffL)OP1 d) & 0xffffffffL; \
|