Searched refs:ORN (Results 1 – 15 of 15) sorted by relevance
/external/v8/src/arm64/ |
D | constants-arm64.h | 503 ORN = ORR | NOT, enumerator 539 ORN_w = LogicalShiftedFixed | ORN, 540 ORN_x = LogicalShiftedFixed | ORN | SixtyFourBits,
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D | macro-assembler-arm64-inl.h | 103 LogicalMacro(rd, rn, operand, ORN); in Orn()
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D | assembler-arm64.cc | 1222 Logical(rd, rn, operand, ORN); in orn()
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/external/vixl/src/vixl/a64/ |
D | constants-a64.h | 527 ORN = ORR | NOT, enumerator 563 ORN_w = LogicalShiftedFixed | ORN, 564 ORN_x = LogicalShiftedFixed | ORN | SixtyFourBits,
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D | macro-assembler-a64.cc | 667 LogicalMacro(rd, rn, operand, ORN); in Orn()
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D | assembler-a64.cc | 1000 Logical(rd, rn, operand, ORN); in orn()
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/external/pcre/dist/sljit/ |
D | sljitNativeARM_64.c | 103 #define ORN 0xaa200000 macro 705 FAIL_IF(push_inst(compiler, (ORN ^ inv_bits) | RD(dst) | RN(TMP_ZERO) | RM(arg2))); in emit_op_imm()
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D | sljitNativeSPARC_common.c | 145 #define ORN (OPC1(0x2) | OPC3(0x06)) macro
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SchedCyclone.td | 409 // AND,BIC,CMTST,EOR,ORN,ORR
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D | AArch64InstrInfo.td | 760 defm ORN : LogicalReg<0b01, 1, "orn", 2808 defm ORN : SIMDLogicalThreeVector<0, 0b11, "orn",
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/external/vixl/doc/ |
D | supported-instructions.md | 896 ### ORN ### subsection 2760 ### ORN ### subsection
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/external/llvm/lib/Target/ARM/ |
D | ARMScheduleSwift.td | 1165 // AND,BIC,EOR,ORN,ORR
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 1217 # ORN
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 1602 @ ORN
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/external/valgrind/none/tests/arm/ |
D | v6intThumb.stdout.exp | 2039 (T3) ORN{S}.W Rd, Rn, #constT [allegedly] 13385 ORN{S}.W Rd, Rn, Rm, {shift}
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