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Searched refs:PIPE_CONTROL_WRITE_IMMEDIATE (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_batchbuffer.c419 OUT_BATCH(PIPE_CONTROL_DEPTH_STALL | PIPE_CONTROL_WRITE_IMMEDIATE); in gen7_emit_vs_workaround_flush()
479 OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE); in intel_emit_post_sync_nonzero_flush()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_batchbuffer.c419 OUT_BATCH(PIPE_CONTROL_DEPTH_STALL | PIPE_CONTROL_WRITE_IMMEDIATE); in gen7_emit_vs_workaround_flush()
479 OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE); in intel_emit_post_sync_nonzero_flush()
/external/mesa3d/src/mesa/drivers/dri/intel/
Dintel_batchbuffer.c419 OUT_BATCH(PIPE_CONTROL_DEPTH_STALL | PIPE_CONTROL_WRITE_IMMEDIATE); in gen7_emit_vs_workaround_flush()
479 OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE); in intel_emit_post_sync_nonzero_flush()
Dintel_reg.h68 #define PIPE_CONTROL_WRITE_IMMEDIATE (1 << 14) macro