| /external/llvm/test/tools/llvm-objdump/ |
| D | win64-unwind-data.test | 16 OBJ-NEXT: Frame register: RBX
20 OBJ-NEXT: 0x0f: UOP_PushNonVol RBX
65 EXE-NEXT: Frame register: RBX
69 EXE-NEXT: 0x0f: UOP_PushNonVol RBX
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| /external/libunwind/src/x86_64/ |
| D | init.h | 52 c->dwarf.loc[RBX] = REG_INIT_LOC(c, rbx, RBX); in common_init()
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| D | unwind_i.h | 42 #define RBX 3 macro
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| D | Gget_save_loc.c | 40 case UNW_X86_64_RBX: loc = c->dwarf.loc[RBX]; break; in unw_get_save_loc()
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| D | Gregs.c | 108 case UNW_X86_64_RBX: loc = c->dwarf.loc[RBX]; break; in tdep_access_reg()
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| D | Gos-freebsd.c | 114 c->dwarf.loc[RBX] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RBX, 0); in unw_handle_signal_frame()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 79 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
606 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
618 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
655 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
691 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
727 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
728 return X86::RBX; in getX86SubSuperRegister()
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| D | X86CallingConv.td | 377 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
693 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
698 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
711 def CSR_64_MostRegs : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10,
722 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
726 def CSR_Win64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI,
738 def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RDI, RSI, R14, R15,
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| D | X86RegisterInfo.td | 132 def RBX : X86Reg<"rbx", 3, [EBX]>, DwarfRegNum<[3, -2, -2]>;
312 // List call-clobbered registers before callee-save registers. RBX, RBP, (and
345 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
368 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>;
391 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
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| D | X86InstrSystem.td | 523 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
585 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in {
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| /external/strace/linux/x86_64/ |
| D | userent.h | 6 XLAT(8*RBX),
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| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| D | ptrace-abi.h | 33 #define RBX 40 macro
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| /external/lzma/Asm/x86/ |
| D | 7zAsm.asm | 65 r3 equ RBX
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 174 ENTRY(RBX) \
192 ENTRY(RBX) \
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| /external/google-breakpad/src/common/android/ |
| D | breakpad_getcontext_unittest.cc | 132 CHECK_REG(RBX); in TEST()
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| /external/llvm/test/CodeGen/X86/ |
| D | ghc-cc64.ll | 8 @r1 = external global i64 ; assigned to register: RBX
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| D | abi-isel.ll | 9209 ; LINUX-64-PIC: pushq [[RBX:%r.x]]
9210 ; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), [[RBX:%r.x]]
9211 ; LINUX-64-PIC-NEXT: callq *([[RBX]])
9212 ; LINUX-64-PIC-NEXT: callq *([[RBX]])
9213 ; LINUX-64-PIC-NEXT: popq [[RBX:%r.x]]
9247 ; DARWIN-64-STATIC: pushq [[RBX:%r.x]]
9248 ; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), [[RBX:%r.x]]
9249 ; DARWIN-64-STATIC-NEXT: callq *([[RBX]])
9250 ; DARWIN-64-STATIC-NEXT: callq *([[RBX]])
9251 ; DARWIN-64-STATIC-NEXT: popq [[RBX:%r.x]]
[all …]
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| D | dynamic-allocas-VLAs.ll | 135 ; FIXME: RA has already reserved RBX, so we can't do dynamic realignment.
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86AsmBackend.cpp | 451 case X86::RBX: in PushInstrSize()
634 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()
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| /external/llvm/include/llvm/DebugInfo/PDB/ |
| D | PDBTypes.h | 402 RBX = 329, enumerator
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| /external/valgrind/coregrind/m_sigframe/ |
| D | sigframe-amd64-linux.c | 356 SC2(rbx,RBX); in synth_ucontext()
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| /external/llvm/lib/DebugInfo/PDB/ |
| D | PDBExtras.cpp | 128 CASE_OUTPUT_ENUM_CLASS_NAME(PDB_RegisterId, RBX, OS) in operator <<()
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| /external/valgrind/VEX/auxprogs/ |
| D | genoffsets.c | 105 GENOFFSET(AMD64,amd64,RBX); in foo()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 376 case X86::RBX: return X86::EBX; in getGR32FromGR64()
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| D | X86AsmInstrumentation.cpp | 168 static const MCPhysReg Candidates[] = { X86::RBP, X86::RAX, X86::RBX, in ChooseFrameReg()
309 ? X86::RBX in InstrumentMOVSBase()
|