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Searched refs:RSval (Results 1 – 17 of 17) sorted by relevance

/external/valgrind/none/tests/mips64/
Dbranches.c3 #define TESTINST1(RSval, RD) \ argument
9 "b end"#RSval "\n\t" \
12 "end"#RSval":" "\n\t" \
17 : "r" (RSval) \
21 out, RSval); \
24 #define TESTINST2(RSval, RD) \ argument
30 "b end12"#RSval "\n\t" \
33 "end12"#RSval":" "\n\t" \
38 : "r" (RSval) \
42 out, RSval); \
[all …]
Dmacro_int.h1 #define TEST1(instruction, RSval, RTval, RD, RS, RT) \ argument
11 : "r" (RSval), "r" (RTval) \
15 instruction, out, (long long) RSval, \
19 #define TEST2(instruction, RSval, imm, RT, RS) \ argument
28 : "r" (RSval) \
32 instruction, out, (long long) RSval, imm); \
35 #define TEST3(instruction, RSval, RD, RS) \ argument
44 : "r" (RSval) \
48 instruction, out, (long long) RSval); \
51 #define TEST4(instruction, RSval, RTval, RS, RT) \ argument
[all …]
Dbranch_and_jump_instructions.c4 #define TEST1(RSval, RD) \ argument
18 : "r" (RSval) \
22 out, (long long) RSval); \
25 #define TEST2(RSval, RD) \ argument
44 : "r" (RSval) \
48 out, (long long) RSval); \
51 #define TEST2a(RSval, RD) \ argument
72 : "r" (RSval) \
76 out, (long long) RSval); \
79 #define TEST2b(RSval, RD) \ argument
[all …]
Dmove_instructions.stdout.exp-BE1163 --- MOVF --- if FPConditionalCode(cc) == 0 then out = RSval else out = RDval
1164 movf :: RDval: 0xaaaaaaaa, RSval: 0x80000000, out: 0xffffffffaaaaaaaa
1165 movf :: RDval: 0xccccffff, RSval: 0xffffffff, out: 0xffffffffccccffff
1166 movf :: RDval: 0xffffaaaa, RSval: 0xaaaaffff, out: 0xffffffffffffaaaa
1167 movf :: RDval: 0x0, RSval: 0xffffffff, out: 0x0
1168 movf :: RDval: 0xaaaaaaaa, RSval: 0x80000000, out: 0xffffffff80000000
1169 movf :: RDval: 0xccccffff, RSval: 0xffffffff, out: 0xffffffffffffffff
1170 movf :: RDval: 0xffffaaaa, RSval: 0xaaaaffff, out: 0xffffffffaaaaffff
1171 movf :: RDval: 0x0, RSval: 0xffffffff, out: 0xffffffffffffffff
1172 movf :: RDval: 0xaaaaaaaa, RSval: 0x80000000, out: 0xffffffff80000000
[all …]
Dmove_instructions.stdout.exp-LE1163 --- MOVF --- if FPConditionalCode(cc) == 0 then out = RSval else out = RDval
1164 movf :: RDval: 0xaaaaaaaa, RSval: 0x80000000, out: 0xffffffffaaaaaaaa
1165 movf :: RDval: 0xccccffff, RSval: 0xffffffff, out: 0xffffffffccccffff
1166 movf :: RDval: 0xffffaaaa, RSval: 0xaaaaffff, out: 0xffffffffffffaaaa
1167 movf :: RDval: 0x0, RSval: 0xffffffff, out: 0x0
1168 movf :: RDval: 0xaaaaaaaa, RSval: 0x80000000, out: 0xffffffff80000000
1169 movf :: RDval: 0xccccffff, RSval: 0xffffffff, out: 0xffffffffffffffff
1170 movf :: RDval: 0xffffaaaa, RSval: 0xaaaaffff, out: 0xffffffffaaaaffff
1171 movf :: RDval: 0x0, RSval: 0xffffffff, out: 0xffffffffffffffff
1172 movf :: RDval: 0xaaaaaaaa, RSval: 0x80000000, out: 0xffffffff80000000
[all …]
Dbranches.stdout.exp76 --- BEQ --- if RSval == RTval then out = RDval + 1 else out = RDval + 6
93 --- BNE --- if RSval != RTval then out = RDval + 1 else out = RDval + 6
110 --- BEQZ --- if RSval == 0 then out = RDval + 1 else out = RDval + 6
127 --- BGEZ --- if RSval >= 0 then out = RDval + 1 else out = RDval + 6
144 --- BGTZ --- if RSval > 0 then out = RDval + 1 else out = RDval + 6
161 --- BLEZ --- if RSval <= 0 then out = RDval + 1 else out = RDval + 6
178 --- BLTZ --- if RSval < 0 then out = RDval + 1 else out = RDval + 6
195 --- BGEZAL --- if RSval >= 0 then out = RDval + 6 else out = RDval + 5
212 --- BLTZAL --- if RSval < 0 then out = RDval + 6 else out = RDval + 5
229 --- BNEZ --- if RSval != 0 then out = RDval + 1 else out = RDval + 6
[all …]
Dmove_instructions.c178 #define TEST5(instruction, RDval, RSval, RD, RS) \ argument
188 : "r" (RDval), "r" (RSval), "f" (fs1_f[i]), "f" (fs2_f[i]) \
192 instruction, RDval, RSval, out); \
Dbranch_and_jump_instructions.stdout.exp515 --- BEQ --- if RSval == RTval then out = RDval + 1 else out = RDval + 6
532 --- BGEZ --- if RSval >= 0 then out = RDval + 1 else out = RDval + 9
549 --- BGEZAL --- if RSval >= 0 then out = RDval + 1 else out = RDval + 6
566 --- BGTZ --- if RSval > 0 then out = RDval + 1 else out = RDval + 9
583 --- BLEZ --- if RSval <= 0 then out = RDval + 1 else out = RDval + 9
600 --- BLTZ --- if RSval < 0 then out = RDval + 1 else out = RDval + 9
617 --- BLTZAL --- if RSval < 0 then out = RDval + 1 else out = RDval + 6
634 --- BNE --- if RSval != RTval then out = RDval + 1 else out = RDval + 6
/external/valgrind/none/tests/mips32/
Dbranches.c3 #define TESTINST1(RSval, RD) \ argument
8 "b end"#RSval"\n\t" \
11 "end"#RSval":\n\t" \
15 : "r" (RSval) \
19 out, RSval); \
22 #define TESTINST2(RSval, RD) \ argument
27 "b end12"#RSval"\n\t" \
30 "end12"#RSval":\n\t" \
34 : "r" (RSval) \
38 out, RSval); \
[all …]
DMoveIns.stdout.exp-BE114 movf $t0, $t1, $fcc0 :: out: 0x0, RDval: 0x0, RSval: 0xffffffff, cc: 1
115 movf $t0, $t1, $fcc0 :: out: 0xffffffff, RDval: 0xffffffff, RSval: 0xffffffff, cc: 0
116 movf $t0, $t1, $fcc0 :: out: 0x22b, RDval: 0x22b, RSval: 0xffffffff, cc: 1
117 movf $t0, $t1, $fcc0 :: out: 0x5, RDval: 0x0, RSval: 0x5, cc: 0
118 movf $t0, $t1, $fcc0 :: out: 0x0, RDval: 0x0, RSval: 0xffffffff, cc: 1
119 movf $t0, $t1, $fcc0 :: out: 0x19, RDval: 0xffffffff, RSval: 0x19, cc: 0
120 movf $t0, $t1, $fcc0 :: out: 0xffffffff, RDval: 0xffffffff, RSval: 0x0, cc: 1
121 movf $t0, $t1, $fcc0 :: out: 0x42, RDval: 0xffffffff, RSval: 0x42, cc: 0
122 movf $t0, $t1, $fcc4 :: out: 0xffffffff, RDval: 0x0, RSval: 0xffffffff, cc: 1
123 movf $t0, $t1, $fcc4 :: out: 0xffffffff, RDval: 0xffffffff, RSval: 0xffffffff, cc: 0
[all …]
Dmips32_dspr2.c75 #define TESTDSPINST_RD_RT_RS_NODSPC(instruction, RTval, RSval) \ argument
85 : "r" (RTval), "r" (RSval) \
89 RTval, RSval); \
92 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
106 : "r" (RSval), "r"(RTval) \
110 RSval, RTval, out, dspCtrl); \
134 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument
145 : "r" (RSval), "r"(RTval) \
148 printf("%s :: rs 0x%08x rt 0x%08x DSPCtrl 0x%08x \n", instruction, RSval, \
152 #define TESTDSPINST_RD_RS_RT_NODSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
[all …]
DMIPS32int.c3 #define TESTINST1(instruction, RSval, RTval, RD, RS, RT) \ argument
13 : "r" (RSval), "r" (RTval) \
17 instruction, out, RSval, RTval); \
20 #define TESTINST2(instruction, RSval, imm, RT, RS) \ argument
28 : "r" (RSval) \
32 instruction, out, RSval, imm); \
35 #define TESTINST3(instruction, RSval, RD, RS) \ argument
43 : "r" (RSval) \
47 instruction, out, RSval); \
50 #define TESTINST3a(instruction, RSval, RTval, RS, RT) \ argument
[all …]
Dmips32_dsp.c76 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
90 : "r" (RSval), "r"(RTval) \
94 instruction, RSval, RTval, out, dspCtrl); \
119 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument
130 : "r" (RSval), "r"(RTval) \
134 instruction, RSval, RTval, dspCtrl); \
137 #define TESTDSPINST_RD_RS_RT_NODSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
148 : "r" (RSval), "r"(RTval) \
152 instruction, RSval, RTval, out); \
155 #define TESTDSPINST_AC_RS_RT_DSPC(instruction, ac, RSval, RTval, HIval, LOval, \ argument
[all …]
DMoveIns.c139 #define TESTINSNMOVE2(instruction, RDval, RSval, RD, RS, cc) \ argument
153 : "r" (RSval), "r" (RDval), "r" (cc) \
157 instruction, out, RDval, RSval, cc); \
/external/valgrind/none/tests/arm/
Dv6intARM.c70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
86 : "r" (RMval), "r" (RNval), "r" (RSval), "r" (carryin) \
90 instruction, out, RMval, RNval, RSval, \
100 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
119 : "r" (RDval), "r" (RD2val), "r" (RMval), "r" (RSval), "r" (carryin) \
123 instruction, out, out2, RMval, RSval, \
Dv6media.c79 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
93 : "r" (RMval), "r" (RNval), "r" (RSval), "r" (gen_cin(carryin)) \
97 instruction, out, RMval, RNval, RSval, \
109 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
126 : "r" (RDval), "r" (RD2val), "r" (RMval), "r" (RSval), "r" (gen_cin(carryin)) \
130 instruction, out, out2, RMval, RSval, \
Dv6intThumb.c162 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, cvin) \ argument
176 : "r" (RMval), "r" (RNval), "r" (RSval), "r" (gen_cvin(cvin)) \
180 instruction, out, RMval, RNval, RSval, \
190 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, cvin) \ argument
207 : "r" (RDval), "r" (RD2val), "r" (RMval), "r" (RSval), "r" (gen_cvin(cvin)) \
211 instruction, out, out2, RMval, RSval, \