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Searched refs:RecIter (Results 1 – 3 of 3) sorted by relevance

/external/llvm/utils/TableGen/
DCodeGenSchedule.cpp190 for (RecIter I = Seq.begin(), E = Seq.end(); I != E; ++I) in scanSchedRW()
196 for (RecIter VI = Vars.begin(), VE = Vars.end(); VI != VE; ++VI) { in scanSchedRW()
199 for (RecIter I = Selected.begin(), E = Selected.end(); I != E; ++I) in scanSchedRW()
221 for (RecIter RWI = RWs.begin(), RWE = RWs.end(); RWI != RWE; ++RWI) { in collectSchedRW()
232 for (RecIter OI = InstRWDefs.begin(), OE = InstRWDefs.end(); OI != OE; ++OI) { in collectSchedRW()
235 for (RecIter RWI = RWDefs.begin(), RWE = RWDefs.end(); in collectSchedRW()
247 for (RecIter II = ItinRWDefs.begin(), IE = ItinRWDefs.end(); II != IE; ++II) { in collectSchedRW()
250 for (RecIter RWI = RWDefs.begin(), RWE = RWDefs.end(); in collectSchedRW()
264 for (RecIter AI = AliasDefs.begin(), AE = AliasDefs.end(); AI != AE; ++AI) { in collectSchedRW()
282 for (RecIter SWI = SWDefs.begin(), SWE = SWDefs.end(); SWI != SWE; ++SWI) { in collectSchedRW()
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DSubtargetEmitter.cpp628 for (RecIter RUI = ResUnits.begin(), RUE = ResUnits.end(); in EmitProcessorResources()
668 for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end(); in FindWriteResources()
688 for (RecIter WRI = ProcModel.WriteResDefs.begin(), in FindWriteResources()
722 for (RecIter AI = SchedRead.Aliases.begin(), AE = SchedRead.Aliases.end(); in FindReadAdvance()
742 for (RecIter RAI = ProcModel.ReadAdvanceDefs.begin(), in FindReadAdvance()
795 for (RecIter PRI = PM.ProcResourceDefs.begin(), in ExpandProcResources()
801 RecIter SubI = SubResources.begin(), SubE = SubResources.end(); in ExpandProcResources()
876 for (RecIter RWI = SCI->InstRWs.begin(), RWE = SCI->InstRWs.end(); in GenSchedClassTables()
893 for (RecIter II = ProcModel.ItinRWDefs.begin(), in GenSchedClassTables()
997 for (RecIter VWI = ValidWrites.begin(), VWE = ValidWrites.end(); in GenSchedClassTables()
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DCodeGenSchedule.h31 typedef std::vector<Record*>::const_iterator RecIter; typedef