Searched refs:RegClassID (Results 1 – 2 of 2) sorted by relevance
273 unsigned RegClassID; in Select() local295 case 1: RegClassID = UseVReg ? AMDGPU::VGPR_32RegClassID : in Select()298 case 2: RegClassID = UseVReg ? AMDGPU::VReg_64RegClassID : in Select()301 case 4: RegClassID = UseVReg ? AMDGPU::VReg_128RegClassID : in Select()304 case 8: RegClassID = UseVReg ? AMDGPU::VReg_256RegClassID : in Select()307 case 16: RegClassID = UseVReg ? AMDGPU::VReg_512RegClassID : in Select()318 case 2: RegClassID = AMDGPU::R600_Reg64RegClassID; break; in Select()321 RegClassID = AMDGPU::R600_Reg128VerticalRegClassID; in Select()323 RegClassID = AMDGPU::R600_Reg128RegClassID; in Select()329 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, MVT::i32); in Select()[all …]
500 unsigned RegClassID = G->getStart()->getDesc().OpInfo[0].RegClass; in scavengeRegister() local501 BitVector AvailableRegs = RS.getRegsAvailable(TRI->getRegClass(RegClassID)); in scavengeRegister()505 AvailableRegs &= RS.getRegsAvailable(TRI->getRegClass(RegClassID)); in scavengeRegister()521 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister()