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Searched refs:RegClassUnitSets (Results 1 – 2 of 2) sorted by relevance

/external/llvm/utils/TableGen/
DCodeGenRegisters.h518 std::vector<std::vector<unsigned> > RegClassUnitSets; variable
698 return RegClassUnitSets.size(); in getNumRegClassPressureSetLists()
706 return RegClassUnitSets[RCIdx]; in getRCPressureSetIDs()
DCodeGenRegisters.cpp1551 assert(RegClassUnitSets.empty() && "this invalidates RegClassUnitSets"); in pruneUnitSets()
1702 RegClassUnitSets.resize(RegClasses.size()); in computeRegUnitSets()
1727 RegClassUnitSets[RCIdx].push_back(USIdx); in computeRegUnitSets()
1731 assert(!RegClassUnitSets[RCIdx].empty() && "missing unit set for regclass"); in computeRegUnitSets()
1749 for (unsigned e = RegClassUnitSets.size(); in computeRegUnitSets()
1751 if (RegClassUnitSets[RCUnitSetsIdx] == RUSets) { in computeRegUnitSets()
1756 if (RCUnitSetsIdx == RegClassUnitSets.size()) { in computeRegUnitSets()
1758 RegClassUnitSets.resize(RCUnitSetsIdx + 1); in computeRegUnitSets()
1759 RegClassUnitSets[RCUnitSetsIdx].swap(RUSets); in computeRegUnitSets()