Searched refs:RegMask (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 158 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut. member
471 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) { in clobbersPhysReg() argument
474 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32)); in clobbersPhysReg()
486 return Contents.RegMask; in getRegMask()
492 return Contents.RegMask; in getRegLiveOut()
685 Op.Contents.RegMask = Mask; in CreateRegMask()
691 Op.Contents.RegMask = Mask; in CreateRegLiveOut()
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| D | MachineRegisterInfo.h | 687 void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) { in addPhysRegsUsedFromRegMask() argument
688 UsedPhysRegMask.setBitsNotInMask(RegMask); in addPhysRegsUsedFromRegMask()
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| D | SelectionDAGNodes.h | 1694 const uint32_t *RegMask;
1698 RegMask(mask) {}
1701 const uint32_t *getRegMask() const { return RegMask; }
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| D | SelectionDAG.h | 492 SDValue getRegisterMask(const uint32_t *RegMask);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 1234 static void CheckForLiveRegDefMasked(SUnit *SU, const uint32_t *RegMask, in CheckForLiveRegDefMasked() argument
1242 if (!MachineOperand::clobbersPhysReg(RegMask, i)) continue; in CheckForLiveRegDefMasked()
1323 if (const uint32_t *RegMask = getNodeRegMask(Node)) in DelayForLiveRegsBottomUp() local
1324 CheckForLiveRegDefMasked(SU, RegMask, LiveRegDefs, RegAdded, LRegs); in DelayForLiveRegsBottomUp()
2716 const uint32_t *RegMask = getNodeRegMask(SU->getNode()); in canClobberReachingPhysRegUse() local
2717 if(!ImpDefs && !RegMask) in canClobberReachingPhysRegUse()
2728 if (RegMask && MachineOperand::clobbersPhysReg(RegMask, PI->getReg()) && in canClobberReachingPhysRegUse()
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| D | SelectionDAG.cpp | 1685 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { in getRegisterMask() argument
1688 ID.AddPointer(RegMask); in getRegisterMask()
1693 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); in getRegisterMask()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 368 const uint32_t *RegMask = getCallPreservedMask(MF, CC); in getReservedRegs() local
369 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
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| D | X86ISelLowering.cpp | 18664 const uint32_t *RegMask = in EmitLoweredSegAlloca() local
18671 .addRegMask(RegMask) in EmitLoweredSegAlloca()
18679 .addRegMask(RegMask) in EmitLoweredSegAlloca()
18688 .addRegMask(RegMask) in EmitLoweredSegAlloca()
18749 const uint32_t *RegMask = in EmitLoweredTLSCall() local
18761 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
18772 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
18783 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 261 // only the resulting RegMask is used; the SaveList is ignored
264 // destructors with 'this' returns, so this RegMask will not be used in that
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.td | 211 // Only the resulting RegMask is used; the SaveList is ignored
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