Searched refs:Rsrc0 (Results 1 – 1 of 1) sorted by relevance
152 unsigned Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0); in runOnMachineFunction() local157 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), Rsrc0) in runOnMachineFunction()198 MI.addOperand(MachineOperand::CreateReg(Rsrc0, false, true, true)); in runOnMachineFunction()