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Searched refs:S5_WRITEDISABLE_ALPHA (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/intel/
Dintel_reg.h164 #define S5_WRITEDISABLE_ALPHA (1<<31) macro
/external/mesa3d/src/gallium/drivers/i915/
Di915_reg.h393 #define S5_WRITEDISABLE_ALPHA (1<<31) macro
Di915_state.c160 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA; in i915_create_blend_state()
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_state.c720 tmp |= S5_WRITEDISABLE_ALPHA; in i915ColorMask()