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Searched refs:S5_WRITEDISABLE_MASK (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/intel/
Dintel_reg.h168 #define S5_WRITEDISABLE_MASK (0xf<<28) macro
/external/mesa3d/src/gallium/drivers/i915/
Di915_reg.h397 #define S5_WRITEDISABLE_MASK (0xf<<28) macro
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_state.c708 GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK; in i915ColorMask()