/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.h | 80 bool IgnoreNodeResults(SDNode *N) const { in IgnoreNodeResults() 124 SmallVector<SDNode*, 128> Worklist; 139 void NoteDeletion(SDNode *Old, SDNode *New) { in NoteDeletion() 149 SDNode *AnalyzeNewNode(SDNode *N); 151 void ExpungeNode(SDNode *N); 159 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); 160 bool CustomWidenLowerNode(SDNode *N, EVT VT); 165 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo); 169 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned); 172 SDNode *Node, bool isSigned); [all …]
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D | SelectionDAGPrinter.cpp | 44 return ((const SDNode *) Node)->getNumValues(); in numEdgeDestLabels() 48 return ((const SDNode *) Node)->getValueType(i).getEVTString(); in getEdgeDestLabel() 53 return itostr(I - SDNodeIterator::begin((const SDNode *) Node)); in getEdgeSourceLabel() 69 SDNode *TargetNode = *I; in getEdgeTarget() 83 static bool hasNodeAddressLabel(const SDNode *Node, in hasNodeAddressLabel() 103 static std::string getSimpleNodeLabel(const SDNode *Node, in getSimpleNodeLabel() 112 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph); 113 static std::string getNodeAttributes(const SDNode *N, in getNodeAttributes() 137 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node, in getNodeLabel() 177 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) { in setGraphAttrs() [all …]
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D | InstrEmitter.h | 41 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, 48 unsigned getDstOfOnlyCopyToRegUse(SDNode *Node, 51 void CreateVirtualRegisters(SDNode *Node, 91 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 98 void EmitCopyToRegClassNode(SDNode *Node, 103 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 109 static unsigned CountResults(SDNode *Node); 118 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned, in EmitNode() 137 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, 139 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
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D | ScheduleDAGSDNodes.cpp | 68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { in newSUnit() 110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, in CheckForPhysRegDependency() 140 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, ArrayRef<EVT> VTs, in CloneNodeWithValues() 163 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) { in AddGlue() 164 SDNode *GlueDestNode = Glue.getNode(); in AddGlue() 188 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) { in RemoveUnusedGlue() 202 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) { in ClusterNeighboringLoads() 203 SDNode *Chain = nullptr; in ClusterNeighboringLoads() 212 SmallPtrSet<SDNode*, 16> Visited; in ClusterNeighboringLoads() 214 DenseMap<long long, SDNode*> O2SMap; // Map from offset to SDNode. in ClusterNeighboringLoads() [all …]
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D | LegalizeFloatTypes.cpp | 49 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { in SoftenFloatResult() 114 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) { in SoftenFloatRes_BITCAST() 118 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, in SoftenFloatRes_MERGE_VALUES() 124 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) { in SoftenFloatRes_BUILD_PAIR() 139 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) { in SoftenFloatRes_EXTRACT_VECTOR_ELT() 146 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) { in SoftenFloatRes_FABS() 158 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) { in SoftenFloatRes_FMINNUM() 171 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) { in SoftenFloatRes_FMAXNUM() 184 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) { in SoftenFloatRes_FADD() 197 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) { in SoftenFloatRes_FCEIL() [all …]
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D | ScheduleDAGSDNodes.h | 55 static bool isPassiveNode(SDNode *Node) { in isPassiveNode() 75 SUnit *newSUnit(SDNode *N); 102 virtual void computeOperandLatency(SDNode *Def, SDNode *Use, 135 const SDNode *Node; 149 const SDNode *GetNode() const { in GetNode() 171 void ClusterNeighboringLoads(SDNode *Node);
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D | ScheduleDAGFast.cpp | 217 SDNode *N = SU->getNode(); in CopyAndMoveSuccessors() 238 SmallVector<SDNode*, 2> NewNodes; in CopyAndMoveSuccessors() 246 SDNode *LoadNode = NewNodes[0]; in CopyAndMoveSuccessors() 392 SUnit *CopyFromSU = newSUnit(static_cast<SDNode *>(nullptr)); in InsertCopiesAndMoveSuccs() 396 SUnit *CopyToSU = newSUnit(static_cast<SDNode *>(nullptr)); in InsertCopiesAndMoveSuccs() 434 static MVT getPhysicalRegisterVT(SDNode *N, unsigned Reg, in getPhysicalRegisterVT() 491 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) { in DelayForLiveRegsBottomUp() 662 std::vector<SDNode*> Sequence; 663 DenseMap<SDNode*, SDNode*> GluedMap; // Cache glue to its user 665 void ScheduleNode(SDNode *N); [all …]
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D | SelectionDAG.cpp | 63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} in NodeDeleted() argument 64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} in NodeUpdated() argument 97 bool ISD::isBuildVectorAllOnes(const SDNode *N) { in isBuildVectorAllOnes() 145 bool ISD::isBuildVectorAllZeros(const SDNode *N) { in isBuildVectorAllZeros() 185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) { in isBuildVectorOfConstantSDNodes() 201 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) { in isBuildVectorOfConstantFPSDNodes() 218 bool ISD::isScalarToVector(const SDNode *N) { in isScalarToVector() 239 bool ISD::allOperandsUndef(const SDNode *N) { in allOperandsUndef() 426 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { in AddNodeIDCustom() 572 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { in AddNodeIDNode() [all …]
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.h | 57 SDNode *Select(SDNode *N) override; 58 SDNode *SelectIntrinsicNoChain(SDNode *N); 59 SDNode *SelectIntrinsicChain(SDNode *N); 60 SDNode *SelectTexSurfHandle(SDNode *N); 61 SDNode *SelectLoad(SDNode *N); 62 SDNode *SelectLoadVector(SDNode *N); 63 SDNode *SelectLDGLDU(SDNode *N); 64 SDNode *SelectStore(SDNode *N); 65 SDNode *SelectStoreVector(SDNode *N); 66 SDNode *SelectLoadParam(SDNode *N); [all …]
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/external/llvm/lib/Target/R600/ |
D | AMDGPUInstrInfo.td | 48 def AMDGPUdwordaddr : SDNode<"AMDGPUISD::DWORDADDR", SDTIntUnaryOp>; 50 def AMDGPUcos : SDNode<"AMDGPUISD::COS_HW", SDTFPUnaryOp>; 51 def AMDGPUsin : SDNode<"AMDGPUISD::SIN_HW", SDTFPUnaryOp>; 54 def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>; 57 def AMDGPUrcp : SDNode<"AMDGPUISD::RCP", SDTFPUnaryOp>; 60 def AMDGPUrsq : SDNode<"AMDGPUISD::RSQ", SDTFPUnaryOp>; 63 def AMDGPUrsq_legacy : SDNode<"AMDGPUISD::RSQ_LEGACY", SDTFPUnaryOp>; 66 def AMDGPUrsq_clamped : SDNode<"AMDGPUISD::RSQ_CLAMPED", SDTFPUnaryOp>; 68 def AMDGPUldexp : SDNode<"AMDGPUISD::LDEXP", AMDGPULdExpOp>; 70 def AMDGPUfp_class : SDNode<"AMDGPUISD::FP_CLASS", AMDGPUFPClassOp>; [all …]
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D | SIISelLowering.h | 47 SDValue performUCharToFloatCombine(SDNode *N, 49 SDValue performSHLPtrCombine(SDNode *N, 52 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 53 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 54 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const; 56 SDValue performMin3Max3Combine(SDNode *N, DAGCombinerInfo &DCI) const; 57 SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const; 97 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 98 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override; 100 SDNode *Node) const override; [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAGISel.h | 80 virtual SDNode *Select(SDNode *N) = 0; 95 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const; 101 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, 195 void ReplaceUses(SDNode *F, SDNode *T) { in ReplaceUses() 225 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const { in CheckNodePredicate() 229 virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N, in CheckComplexPattern() 231 SmallVectorImpl<std::pair<SDValue, SDNode*> > &Result) { in CheckComplexPattern() 239 SDNode *SelectCodeCommon(SDNode *NodeToMatch, 252 SDNode *Select_INLINEASM(SDNode *N); 253 SDNode *Select_READ_REGISTER(SDNode *N); [all …]
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D | SelectionDAGNodes.h | 46 class SDNode; variable 53 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr, 70 bool isBuildVectorAllOnes(const SDNode *N); 74 bool isBuildVectorAllZeros(const SDNode *N); 78 bool isBuildVectorOfConstantSDNodes(const SDNode *N); 82 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N); 87 bool isScalarToVector(const SDNode *N); 91 bool allOperandsUndef(const SDNode *N); 108 SDNode *Node; // The node defining the value we are using. 112 SDValue(SDNode *node, unsigned resno); [all …]
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D | SelectionDAG.h | 83 template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> { 85 mutable ilist_half_node<SDNode> Sentinel; 87 SDNode *createSentinel() const { 88 return static_cast<SDNode*>(&Sentinel); 90 static void destroySentinel(SDNode *) {} 92 SDNode *provideInitialHead() const { return createSentinel(); } 93 SDNode *ensureHead(SDNode*) const { return createSentinel(); } 94 static void noteHead(SDNode*, SDNode*) {} 96 static void deleteNode(SDNode *) { 100 static void createNode(const SDNode &); [all …]
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/external/llvm/lib/Target/X86/ |
D | X86InstrFragmentsSIMD.td | 19 def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1, 22 def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1, 44 def X86umin : SDNode<"X86ISD::UMIN", SDTIntBinOp>; 45 def X86umax : SDNode<"X86ISD::UMAX", SDTIntBinOp>; 46 def X86smin : SDNode<"X86ISD::SMIN", SDTIntBinOp>; 47 def X86smax : SDNode<"X86ISD::SMAX", SDTIntBinOp>; 49 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>; 50 def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>; 53 def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp, 55 def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp, [all …]
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 47 // SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is 288 class SDNode<string opcode, SDTypeProfile typeprof, 289 list<SDNodeProperty> props = [], string sdclass = "SDNode"> 303 def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">; 304 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">; 305 def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">; 306 def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">; 307 def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">; 308 def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">; 309 def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>; [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 66 SDNode *Select(SDNode *N) override; 78 SDNode *SelectFrameIndex(SDNode *N); 84 SDNode *SelectLoad(SDNode *N); 85 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl); 86 SDNode *SelectIndexedLoad(LoadSDNode *LD, SDLoc dl); 87 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode, 89 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode, 91 SDNode *SelectBaseOffsetStore(StoreSDNode *ST, SDLoc dl); 92 SDNode *SelectIndexedStore(StoreSDNode *ST, SDLoc dl); 93 SDNode *SelectStore(SDNode *N); [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZOperators.td | 91 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 93 def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 96 def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 99 def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 101 def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 104 def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 107 def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 110 def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 113 def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 114 def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", [all …]
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelDAGToDAG.h | 26 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc DL, 33 void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg); 35 bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 38 std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
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D | MipsISelDAGToDAG.h | 45 SDNode *getGlobalBaseReg(); 83 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 87 virtual bool selectVSplat(SDNode *N, APInt &Imm) const; 116 SDNode *Select(SDNode *N) override; 118 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0; 121 inline SDValue getImm(const SDNode *Node, uint64_t Imm) { in getImm()
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D | Mips16ISelDAGToDAG.cpp | 46 std::pair<SDNode*, SDNode*> 47 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, SDLoc DL, EVT Ty, in selectMULT() 49 SDNode *Lo = nullptr, *Hi = nullptr; in selectMULT() 50 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0), in selectMULT() 127 void Mips16DAGToDAGISel::getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg) { in getMips16SPRefReg() 164 SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset, in selectAddr16() 244 std::pair<bool, SDNode*> Mips16DAGToDAGISel::selectNode(SDNode *Node) { in selectNode() 283 SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops); in selectNode() 285 SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, DL, VT, in selectNode() 288 SDNode *Result = CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, in selectNode() [all …]
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D | MipsSEISelDAGToDAG.h | 37 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl, 40 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, 41 SDLoc DL, SDNode *Node) const; 81 bool selectVSplat(SDNode *N, APInt &Imm) const override; 113 std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelDAGToDAG.cpp | 114 SDNode *Select(SDNode *N) override; 115 SDNode *SelectIndexedLoad(SDNode *Op); 116 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, 326 SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDNode *N) { in SelectIndexedLoad() 350 SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op, in SelectIndexedBinOp() 365 SDNode *ResNode = in SelectIndexedBinOp() 379 SDNode *MSP430DAGToDAGISel::Select(SDNode *Node) { in Select() 410 if (SDNode *ResNode = SelectIndexedLoad(Node)) in Select() 415 if (SDNode *ResNode = in Select() 420 else if (SDNode *ResNode = in Select() [all …]
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUInstrInfo.td | 30 def AMDGPUbitalign : SDNode<"AMDGPUISD::BITALIGN", AMDGPUDTIntTernaryOp>; 33 def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>; 36 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp, 41 def AMDGPUsmax : SDNode<"AMDGPUISD::SMAX", SDTIntBinOp, 46 def AMDGPUumax : SDNode<"AMDGPUISD::UMAX", SDTIntBinOp, 51 def AMDGPUfmin : SDNode<"AMDGPUISD::FMIN", SDTFPBinOp, 56 def AMDGPUsmin : SDNode<"AMDGPUISD::SMIN", SDTIntBinOp, 61 def AMDGPUumin : SDNode<"AMDGPUISD::UMIN", SDTIntBinOp, 69 def AMDGPUurecip : SDNode<"AMDGPUISD::URECIP", SDTIntUnaryOp>;
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/external/llvm/test/CodeGen/X86/ |
D | misched-aa-colored.ll | 8 %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090" = type { %"class.llvm::FoldingSetImpl::Node.0.… 10 …lass.llvm::ilist_half_node.1.601.961.1921.2041.2281.4081", %"class.llvm::SDNode.10.610.970.1930.20… 11 %"class.llvm::ilist_half_node.1.601.961.1921.2041.2281.4081" = type { %"class.llvm::SDNode.10.610.9… 14 …pe { %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083", %"class.llvm::SDNode.10.610.970.1930.20… 15 %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083" = type { %"class.llvm::SDNode.10.610.970.1930.… 17 …ss.llvm::LLVMContext.6.606.966.1926.2046.2286.4086"*, i32, %"class.llvm::SDNode.10.610.970.1930.20… 62 …truct.llvm::ilist_traits.53.653.1013.1973.2093.2333.4133", %"class.llvm::SDNode.10.610.970.1930.20… 85 %"struct.std::pair.40.77.677.1037.1997.2117.2357.4157" = type { %"class.llvm::SDNode.10.610.970.193… 90 …SDNode *, std::pair<const llvm::SDNode *const, std::basic_string<char> >, std::_Select1st<std::pai… 91 …SDNode *, std::pair<const llvm::SDNode *const, std::basic_string<char> >, std::_Select1st<std::pai… [all …]
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